PABI: Developing a New Robotic Platform for Autism Therapy

Autism Spectrum Disorder affects many children across the world. Through the use of Applied Behavioral Analysis (ABA) therapy, improvements in behavior and social outcomes have been observed. We have developed a new, robust, and durable research platform designed to interact with children through basic ABA therapy in order to test the effectiveness of robots in autism therapy. This platform is able to log therapy sessions while interacting with the child in an innovative way through multiple degrees of freedom. The platform is also designed to be expandable by future researchers with the ability to integrate both additional actuators and sensors. Lastly, the entire structure is modular in its construction, meaning entire modules can be removed and added in the future with minimal effort

TAO Conceptual Design Report: A Precision Measurement of the Reactor Antineutrino Spectrum with Sub-percent Energy Resolution

The Taishan Antineutrino Observatory (TAO, also known as JUNO-TAO) is a satellite experiment of the Jiangmen Underground Neutrino Observatory (JUNO). A ton-level liquid scintillator detector will be placed at about 30 m from a core of the Taishan Nuclear Power Plant. The reactor antineutrino spectrum will be measured with sub-percent energy resolution, to provide a reference spectrum for future reactor neutrino experiments, and to provide a benchmark measurement to test nuclear databases. A spherical acrylic vessel containing 2.8 ton gadolinium-doped liquid scintillator will be viewed by 10 m^2 Silicon Photomultipliers (SiPMs) of >50% photon detection efficiency with almost full coverage. The photoelectron yield is about 4500 per MeV, an order higher than any existing large-scale liquid scintillator detectors. The detector operates at -50 degree C to lower the dark noise of SiPMs to an acceptable level. The detector will measure about 2000 reactor antineutrinos per day, and is designed to be well shielded from cosmogenic backgrounds and ambient radioactivities to have about 10% background-to-signal ratio. The experiment is expected to start operation in 2022

A 128K-bit CCD buffer memory system

A prototype system was implemented to demonstrate that CCD's can be applied advantageously to the problem of low power digital storage and particularly to the problem of interfacing widely varying data rates. 8K-bit CCD shift register memories were used to construct a feasibility model 128K-bit buffer memory system. Peak power dissipation during a data transfer is less than 7 W., while idle power is approximately 5.4 W. The system features automatic data input synchronization with the recirculating CCD memory block start address. Descriptions are provided of both the buffer memory system and a custom tester that was used to exercise the memory. The testing procedures and testing results are discussed. Suggestions are provided for further development with regards to the utilization of advanced versions of CCD memory devices to both simplified and expanded memory system applications

Hybrid monolithic integration of high-power DC-DC converters in a high-voltage technology

The supply of electrical energy to home, commercial, and industrial users has become ubiquitous, and it is hard to imagine a world without the facilities provided by electrical energy. Despite the ever increasing efficiency of nearly every electrical application, the worldwide demand for electrical power continues to increase, since the number of users and applications more than compensates for these technological improvements. In order to maintain the affordability and feasibility of the total production, it is essential for the distribution of the produced electrical energy to be as efficient as possible. In other words the loss in the power distribution is to be minimized. By transporting electrical energy at the maximum safe voltage, the current in the conductors, and the associated conduction loss can remain as low as possible. In order to optimize the total efficiency, the high transportation voltage needs to be converted to the appropriate lower voltage as close as possible to the end user. Obviously, this conversion also needs to be as efficient, affordable, and compact as possible. Because of the ever increasing integration of electronic systems, where more and more functionality is combined in monolithically integrated circuits, the cost, the power consumption, and the size of these electronic systems can be greatly reduced. This thorough integration is not limited to the electronic systems that are the end users of the electrical energy, but can also be applied to the power conversion itself. In most modern applications, the voltage conversion is implemented as a switching DC-DC converter, in which electrical energy is temporarily stored in reactive elements, i.e. inductors or capacitors. High switching speeds are used to allow for a compact and efficient implementation. For low power levels, typically below 1 Watt, it is possible to monolithically implement the voltage conversion on an integrated circuit. In some cases, this is even done on the same integrated circuit that is the end user of the electrical energy to minimize the system dimensions. For higher power levels, it is no longer feasible to achieve the desired efficiency with monolithically integrated components, and some external components prove indispensable. Usually, the reactive components are the main limiting factor, and are the first components to be moved away from the integrated circuit for increasing power levels. The semiconductor components, including the power transistors, remain part of the integrated circuit. Using this hybrid approach, it is possible in modern converterapplications to process around 60 Watt, albeit limited to voltages of a few Volt. For hybrid integrated converters with an output voltage of tens of Volt, the power is limited to approximately 10 Watt. For even higher power levels, the integrated power transistors also become a limiting factor, and are replaced with discrete power devices. In these discrete converters, greatly increased power levels become possible, although the system size rapidly increases. In this work, the limits of the hybrid approach are explored when using so-called smart-power technologies. Smart-power technologies are standard lowcost submicron CMOS technologies that are complemented with a number of integrated high-voltage devices. By using an appropriate combination of smart-power technologies and circuit topologies, it is possible to improve on the current state-of-the-art converters, by optimizing the size, the cost, and the efficiency. To determine the limits of smart-power DC-DC converters, we first discuss the major contributing factors for an efficient energy distribution, and take a look at the role of voltage conversion in the energy distribution. Considering the limitations of the technologies and the potential application areas, we define two test-cases in the telecommunications sector for which we want to optimize the hybrid monolithic integration in a smart-power technology. Subsequently, we explore the specifications of an ideal converter, and the relevant properties of the affordable smart-power technologies for the implementation of DC-DC converters. Taking into account the limitations of these technologies, we define a cost function that allows to systematically evaluate the different potential converter topologies, without having to perform a full design cycle for each topology. From this cost function, we notice that the de facto default topology selection in discrete converters, which is typically based on output power, is not optimal for converters with integrated power transistors. Based on the cost function and the boundary conditions of our test-cases, we determine the optimal topology for a smart-power implementation of these applications. Then, we take another step towards the real world and evaluate the influence of parasitic elements in a smart-power implementation of switching converters. It is noticed that the voltage overshoot caused by the transformer secondary side leakage inductance is a major roadblock for an efficient implementation. Since the usual approach to this voltage overshoot in discrete converters is not applicable in smart-power converters due to technological limitations, an alternative approach is shown and implemented. The energy from the voltage overshoot is absorbed and transferred to the output of the converter. This allows for a significant reduction in the voltage overshoot, while maintaining a high efficiency, leading to an efficient, compact, and low-cost implementation. The effectiveness of this approach was tested and demonstrated in both a version using a commercially available integrated circuit, and our own implementation in a smart-power integrated circuit. Finally, we also take a look at the optimization of switching converters over the load range by exploiting the capabilities of highly integrated converters. Although the maximum output power remains one of the defining characteristics of converters, it has been shown that most converters spend a majority of their lifetime delivering significantly lower output power. Therefore, it is also desirable to optimize the efficiency of the converter at reduced output current and output power. By splitting the power transistors in multiple independent segments, which are turned on or off in function of the current, the efficiency at low currents can be significantly improved, without introducing undesirable frequency components in the output voltage, and without harming the efficiency at higher currents. These properties allow a near universal application of the optimization technique in hybrid monolithic DC-DC converter applications, without significant impact on the complexity and the cost of the system. This approach for the optimization of switching converters over the load range was demonstrated using a boost converter with discrete power transistors. The demonstration of our smart-power implementation was limited to simulations due to an issue with a digital control block. On a finishing note, we formulate the general conclusions and provide an outlook on potential future work based on this research

Man-Computer Interactive Data Access System (McIDAS). Continued development of McIDAS and operation in the GARP Atlantic tropical experiment

The complete output of the Synchronous Meteorological Satellite was recorded on one inch magnetic tape. A quality control subsystem tests cloud track vectors against four sets of criteria: (1) rejection if best match occurs on correlation boundary; (2) rejection if major correlation peak is not distinct and significantly greater than secondary peak; (3) rejection if correlation is not persistent; and (4) rejection if acceleration is too great. A cloud height program determines cloud optical thickness from visible data and computer infrared emissivity. From infrared data and temperature profile, cloud height is determined. A functional description and electronic schematics of equipment are given

Road Traffic Rules Violators' Monitoring System

This purpose of this system is to catch vehicle, which breaks the red traffic signal by sending the unique characters (e.g. vehicle's registration number) to the database and keep the record for future action. The main objective of this project is to transmit alphanumeric characters through RF medium and display the characters on the LCD matrix at the receiver. The system is using digital RF transmitter and receiver integrated with 16F84A PIC micro controller for the ASCII code conversion, data encoding and decoding task. Thus, the next objective is to develop the programming code for the 16F84A to perform all these tasks. In the project, the assembly language is used to develop the programming code. The VMS operates only when the traffic signal is red. In this project, a switch is used to trigger the transmitter in the vehicle at that particular time. The switch is only working under certain state condition (RED light is ON). In the future and practical used, the switch can be replaced with a Hall sensor. The hall sensor detects the magnetic flux introduced by the electromagnet, which is installed under the road surface. The first section of the report will tell about the introduction of background of the project, the concept ofRTRVMS, problem statement, objectives and scopes of study. The second section of the report is literature review of the components used in the system. The third section will be the methodology and project work including the project development. The forth section! is the project Findings and discussion throughout this semester and also the problem facing. This simple system can be one of the solutions to control the road traffic violent in the future

Design of a fault tolerant airborne digital computer. Volume 2: Computational requirements and technology

This final report summarizes the work on the design of a fault tolerant digital computer for aircraft. Volume 2 is composed of two parts. Part 1 is concerned with the computational requirements associated with an advanced commercial aircraft. Part 2 reviews the technology that will be available for the implementation of the computer in the 1975-1985 period. With regard to the computation task 26 computations have been categorized according to computational load, memory requirements, criticality, permitted down-time, and the need to save data in order to effect a roll-back. The technology part stresses the impact of large scale integration (LSI) on the realization of logic and memory. Also considered was module interconnection possibilities so as to minimize fault propagation