Distributed Modeling Approach for Electrical and Thermal Analysis of High-Frequency Transistors

The research conducted in this dissertation is focused on developing modeling approaches for analyzing high-frequency transistors and present solutions for optimizing the device output power and gain. First, a literature review of different transistor types utilized in high-frequency regions is conducted and gallium nitride high electron mobility transistor is identified as the promising device for these bands. Different structural configurations and operating modes of these transistors are explained, and their applications are discussed. Equivalent circuit models and physics-based models are also introduced and their limitations for analyzing the small-signal and large-signal behavior of these devices are explained. Next, a model is developed to investigate the thermal properties of different semiconductor substrates. Heat dissipation issues associated with some substrate materials, such as sapphire, silicon, and silicon carbide are identified, and thinning the substrates is proposed as a preliminary solution for addressing them. This leads to a comprehensive and universal approach to increase the heat dissipation capabilities of any substrate material and 2X-3X improvement is achieved according to this novel technique. Moreover, for analyzing the electrical behavior of these devices, a small-signal model is developed to examine the operation of transistors in the linear regions. This model is obtained based on an equivalent circuit which includes the distributed effects of the device at higher frequency bands. In other words, the wave propagation effects and phase velocity mismatches are considered when developing the model. The obtained results from the developed simulation tool are then compared with the measurements and excellent agreement is achieved between the two cases, which serves as the proof for validation. Additionally, this model is extended to predict and analyze the nonlinear behavior of these transistors and the developed tool is validated according to the obtained large-signal analysis results from measurement. Based on the developed modeling approach, a novel fabrication technique is also proposed which ensures the high-frequency operability of current devices with the available fabrication technologies, without forfeiting the gain and output power. The technical details regarding this approach and a sample configuration of the electrode model for the transistor based on the proposed design are also provided

Linear characterization and modeling of GaN-on-Si HEMT technologies with 100 nm and 60 nm gate lengths

Motivated by the growing interest towards low-cost, restriction-free MMIC processes suitable for multi-function, possibly space-qualified applications, this contribution reports the extraction of reliable linear models for two advanced GaN-on-Si HEMT technologies, namely OMMIC’s D01GH (100 nm gate length) and D006GH (60 nm gate length). This objective is pursued by means of both classical and more novel approaches. In particular, the latter include a nondestructive method for determining the extrinsic resistances and an optimizaion-based approach to extracting the remaining parasitic elements: these support standard DC and RF measurements in order to obtain a scalable, bias-dependent equivalent-circuit model capturing the small-signal behavior of the two processes. As to the noise model, this is extracted by applying the well known noise-temperature approach to noise figure measurements performed in two different frequency ranges: a lower band, where a standard Y-factor test bench is used, and an upper band, where a custom cold-source test bench is set up and described in great detail. At 5 V drain-source voltage, minimum noise figures as low as 1.5 dB and 1.1 dB at 40 GHz have been extracted for the considered 100 nm and 60 nm HEMTs, respectively: this testifies the maturity of both processes and the effectiveness of the gate length reduction. The characterization and modeling campaign, here presented for the first time, has been repeatedly validated by published designs, a couple of which are reviewed for the Reader’s convenience

On-wafer, cryogenic characterization of ultra-low noise HEMT devices

Significant advances in the development of high electron-mobility field-effect transistors (HEMT's) have resulted in cryogenic, low-noise amplifiers (LNA's) whose noise temperatures are within an order of magnitude of the quantum noise limit (hf/k). Further advances in HEMT technology at cryogenic temperatures may eventually lead to the replacement of maser and superconducting insulator superconducting front ends in the 1- to 100-GHz frequency band. Key to identification of the best HEMT's and optimization of cryogenic LNA's are accurate and repeatable device measurements at cryogenic temperatures. This article describes the design and operation of a cryogenic coplanar waveguide probe system for the characterization and modeling of advanced semiconductor transistors at cryogenic temperatures. Results on advanced HEMT devices are presented to illustrate the utility of the measurement system

Modélisation distribuée et évolutive du GaN HEMT

L’industrie de télécommunication et les satellites se base majoritairement sur les technologies Si et GaAs. La demande croissante des hauts débits de données entraine une facture élevée en énergie. En outre, la saturation de la bande des basses fréquences, le besoin des débits élevés et les exigences de la haute puissance imposait l’utilisation de la bande hautes fréquences. Dans le but de résoudre les problèmes cités auparavant, la technologie GaN est introduite comme un candidat prometteur qui peut offrir de la haute puissance, taille du circuit plus faible avec une meilleure stabilité mécanique aux environnements hostiles/milieux agressifs. À titre d’exemple, l‘agence spatiale européenne sont en cours de développement d’un circuit à base du GaN sur substrat en Si pour faible cout, une hautes performance et une grande fiabilité. La technologie GaN est assez mature pour proposer de nouveaux systèmes intégrés utilisés pour les puissances microonde ce qui permet une réduction considérable de la taille du système. Étant un semiconducteur à grande bande interdite, GaN peut offrir une haute puissance sous hautes températures (>225oC) avec une bonne stabilité mécanique. Elle présente un facteur de bruit faible, qui est intéressant notamment pour les circuits intégrés aux ondes millimétriques. À noter que la mobilité du GaN par rapport à la température est assez élevée pour proposer des amplificateurs dans la bande W. Avec le progrès du procédé de fabrication du GaN, notre objectif est l’introduction de cette technologie dans des applications industrielles. À cette fin, on désire avoir un modèle du dispositif qui correspond à la meilleure performance. Ensuite, on veut le valider dans une modélisation du circuit. Cette thèse, basée sur la technologie GaN unique développée au 3IT, a pour objectif l’amélioration de l’outil de conception en réduisant son erreur avec une validation de son utilisation dans la conception du circuit. Ce travail est réalisé pour la première fois au 3IT avec des résultats de simulation pour une conception idéale d’un circuit MMIC ainsi que sa démonstration. Une caractérisation des échantillons a été réalisée avec objectif d’extraction de données qui vont servir à l’alimentation de modélisation des transistors sur l’outil ADS. Une fois complétée, la modélisation a été validée par une modélisation des petits et grands signaux et a été testée par une mesure load-pull. Enfin, ce modèle a été utilisé lors de la conception d’un amplificateur pour les applications RF. L’innovation de ce travail réside dans la modélisation de la résistance d’une grille large sous forme de quadripôles parallèles à structure 3D (ou à résistances de grille distribuées) du transistor MOSHEMT GaN. La conception et la fabrication de l’amplificateur à haute puissance (HPA) aux fréquences microondes (≤4GHz) sont réalisés au LNN du 3IT et inclus une couche d’oxyde de grille afin de réduire le courant de fuite notamment pour les tensions Vgs élevées, la grille du transistor forme un serpentin pour fournir une puissance de sortie élevée avec un encombrement spatial minimal et une grille présentant une électrode de champ pour permettre d’augmenter la tension de claquage.Abstract : The telecommunication and satellite industry is mainly relying on Si and GaAs technologies as the demand for a high data rate is continuously growing, leading to higher power consumption. Moreover, the lower frequency band's saturation, the need for high data rate, and high-power force to utilize the high-frequency band. In pursuit of solving the issues mentioned earlier, GaN technology has been introduced as a promising candidate that can offer high power at a smaller circuit footprint and higher mechanical stability in harsh environments. For example, currently, the European space agency (ESA) is developing an integrated circuit with GaN on Si substrate for low cost, high performance, and high reliability. GaN technology is sufficiently mature to propose integrated new systems which are needed for microwave power range. This technology reduces the size of the system considerably. GaN is a wide bandgap semiconductor which can offer remarkably high power at high temperature (>225℃), and it is very stable mechanically. It presents a low noise factor, very interesting for a millimeter-wave integrated circuit. Finally, the mobility of GaN vs. temperature is sufficiently elevated to propose a power amplifier in W-Band. With the improvement of the GaN process, our objective is to introduce this technology for industrial applications. For this purpose, we wish to have a better model of the device that corresponds to the best performance and then validate it by using this model in a circuit. Based on the 3IT's GaN process, which is unique in its context, this thesis aims to improve the design kit by reducing the design model's error and validating it by using it in circuit design. This work is the first to realize in 3IT with simulation results to design an MMIC circuit for demonstration. I first characterized the new samples by performing different measurements than using these measurement data; transistor is modeled in ADS software. Once the model was completed, it is validated by small-signal modeling, and then the large-signal model is tested with non-linear capacitances, current source, and transconductance modeling. Finally, we used this model to design a power amplifier for RF application. The innovation comes from modeling large gate resistance as distributed gate resistance for GaN MOSHEMT transistor and then designing high-power amplifier (HPA) in the frequency range (≤ 4GHz) while using 3IT GaN process which includes first oxide layer to have low gate current and more voltage of Vgs, the second transistor is meander to have high power and third, field plate - gate for high breakdown voltage

Boundary layer flow and heat transfer over a permeable shrinking sheet with partial slip

The steady, laminar flow of an incompressible viscous fluid over a shrinking permeable sheet is investigated. The governing partial differential equations are transformed into ordinary differential equations using similarity transformation, before being solved numerically by the shooting method. The features of the flow and heat transfer characteristics for different values of the slip parameter and Prandtl number are analyzed and discussed. The results indicate that both the skin friction coefficient and the heat transfer rate at the surface increase as the slip parameter increases

GaN-based HEMTs for Cryogenic Low-Noise Applications

Radio-astronomy deals with signals and radiations of extremely weak intensity. Also, it requires robust and rugged technologies able to sustain and prevent the Radio Frequency Interferences (RFI). Complying with the required high sensitivity, Low Noise Amplifiers (LNAs) operating at cryogenic temperatures are key elements in radio astronomy instrumentation. Thus far, advanced semiconductor technologies but with limited power-handling capabilities have been traditionally employed as LNAs. Over the past decades, Gallium Nitride (GaN)-based high electron mobility transistors (HEMTs) were demonstrated at room temperature to offer a combination of both excellent low-noise operation and a superior high-power handling performance compared to other materials. In addition, a number of studies indicated a promising potential for the GaN technology to operate at cryogenic temperatures. However, the cryogenic noise performance of the GaN-HEMTs remained unexplored so far.This thesis investigates the potential of GaN–based HEMTs for low-noise operation at these cryogenic temperatures. Established characterization and modeling approaches were employed for this purpose. As a main result, this work reveals a first estimation of the noise performance of GaN-HEMTs at cryogenic temperatures of ~10 K which compares to other more advanced technologies in this field. This was achieved through the extraction of a model, based on experimental noise measurements, describing the microwave noise behavior at cryogenic temperatures at the device level. The model predicts the noise contribution of GaN-HEMTs at cryogenic temperatures with respect to the frequency of operation, the dissipated power, and the total periphery of the device. Hence, it constitutes the basis for the design of future GaN-based LNAs which fulfill the different requirements set by the demanding cryogenic applications.The extracted cryogenic noise model was used to identify and analyze the role of the different physical parameters of the device, over which a technological control might be possible in the future in order to improve the assessed noise performance of the cryogenic GaN-HEMTs. From that perspective, GaN-HEMTs featuring superconducting Niobium (Nb)-gates were demonstrated for the first time. The successful integration of superconducting Nb-gates into AlGaN/GaN HEMTs was demonstrated on different samples, showing a suppression of the gate resistance independently of the width and length of the gate below a critical temperature \u1d447\u1d450 < 9.2 K. The superconductivity of the gate leads to the cancellation of the associated noise contribution. Comparing the noise performance of the resulting devices to that of the conventional Gold (Au)-gated GaN-HEMTs, it was concluded that further management of the device’s self-heating is required to enable the full potential of the Nb-gate by maintaining its superconductivity while operating at optimum-noise bias conditions

InP based 77 GHz monolithic millimetre wave integrated circuits

Abstract available: p. I-II

Characterisation and Modelling of Graphene FETs for Terahertz Mixers and Detectors

Graphene is a two-dimensional sheet of carbon atoms with numerous envisaged applications owing to its exciting properties. In particular, ultrahigh-speed graphene field effect transistors (GFETs) are possible due to the unprecedented carrier velocities in ideal graphene. Thus, GFETs may potentially advance the current upper operation frequency limit of RF electronics. In this thesis, the practical viability of high-frequency GFETs based on large-area graphene from chemical vapour deposition (CVD) is investigated. Device-level GFET model parameters are extracted to identify performance bottlenecks. Passive mixer and power detector terahertz circuits operating above the present active GFET transit time limit are demonstrated. The first device-level microwave noise characterisation of a CVD GFET is presented. This allows for the de-embedding of the noise parameters and construction of noise models for the intrinsic device. The correlation of the gate and drain noise in the PRC model is comparable to that of Si MOSFETs. This indicates higher long-term GFET noise relative to HEMTs. An analytical power detector model derived using Volterra analysis on the FET large-signal model is verified at frequencies up to 67 GHz. The drain current derivatives, intrinsic capacitors and parasitic resistors of the closed-form expressions for the noise equivalent power (NEP) are extracted from DC and S-parameter measurements. The model shows that a short gate length and a bandgap in the channel are required for optimal FET sensitivity. A power detector integrated with a split bow-tie antenna on a Si substrate demonstrates an optical NEP of 500 pW/Hz^1/2 at 600 GHz. This represents a state-of-the-art result for quasi-optically coupled, rectifying direct detectors based on GFETs operating at room temperature. The subharmonic GFET mixer utilising the electron-hole symmetry in graphene is scaled to operate with a centre frequency of 200 GHz, the highest frequency reported so far for graphene integrated circuits. The down-converter circuit is implemented in a coplanar waveguide (CPW) on Si and exhibits a conversion loss (CL) of 29 ± 2 dB in the 185-210 GHz band. In conclusion, the CVD GFETs in this thesis are unlikely to reach the performance required for high-end RF applications. Instead, they currently appear more likely to compete in niche applications such as flexible electronics