448 research outputs found
An automatic microprogramming system.
by Wu Kam-wah.Bibliography: leaves [129]-[130]Thesis (M.Ph.)--Chinese University of Hong Kong, 198
Graphical microcode simulator with a reconfigurable datapath
Microcode is a symbolic way to simplify control design that allows changing, testing and updating the control unit of processors. By changing the microcode, the same datapath can be used for an entirely different application, such as supporting a completely different instruction set. For these reasons, a majority of control units in modern day processors are microcoded. The object was to investigate and implement a graphical microcode simulator with a reconfigurable datapath and microcode format. By allowing a wide configuration of the datapath, many types of logical processors can be designed and simulated. The resulting implemented simulator is able to fill the void in microprogramming tools since there are no graphical microcode simulators that allow such customization of the datapath. The customization of the datapath goes beyond allowing different files specifying the datapath, it allows the datapath to be created and modified using the graphical interface.This tool is able to be used to design and simulate general-purpose processors and application specific processors through datapath and microcode configurations. In the academic setting, this tool provides easier microcode testing through verification on the instruction level for instructors and provide simulation debugging through code tracing and breakpoints for students
Packet Transactions: High-level Programming for Line-Rate Switches
Many algorithms for congestion control, scheduling, network measurement,
active queue management, security, and load balancing require custom processing
of packets as they traverse the data plane of a network switch. To run at line
rate, these data-plane algorithms must be in hardware. With today's switch
hardware, algorithms cannot be changed, nor new algorithms installed, after a
switch has been built.
This paper shows how to program data-plane algorithms in a high-level
language and compile those programs into low-level microcode that can run on
emerging programmable line-rate switching chipsets. The key challenge is that
these algorithms create and modify algorithmic state. The key idea to achieve
line-rate programmability for stateful algorithms is the notion of a packet
transaction : a sequential code block that is atomic and isolated from other
such code blocks. We have developed this idea in Domino, a C-like imperative
language to express data-plane algorithms. We show with many examples that
Domino provides a convenient and natural way to express sophisticated
data-plane algorithms, and show that these algorithms can be run at line rate
with modest estimated die-area overhead.Comment: 16 page
Levels of Representation of Programs and the Architecture of Universal Host Machines
Coordinated Science Laboratory was formerly known as Control Systems LaboratoryJoint Services Electronics Program / DAAB-07-72-C-025
Recommended from our members
REGTRAN and MICRO, the implementation of two digital system simulators
REGTRAN (REGister TRANsfer), a hardware description
language and SYSSIM (SYStems SIMulation), a simulator for the
system described by REGTRAN were originally developed by Edward
Pett, Jr [33] at the University of Texas at Austin. These two programs
are successfully used to simulate many digital systems of
complex nature. It is the primary purpose of this paper to describe
the implementation of these two programs for KRONOS at Oregon
State University. In this process, various problems, due to the differences
in the operating systems, were faced. These problems are
discussed in detail and the changes that were made are included.
REGTRAN and SYSSIM are not capable of simulating micro-instructions
or a microprocessor. For this reason, another simulator MICRO is
developed. Detailed description of MICRO and its use as a general
purpose simulator as well as a microprogram simulator are given in detail. As an example, partial emulation of DEC PDP-8 is shown.
Suggestions for the improvement of MICRO, REGTRAN and SYSSIM
are mentioned
Creatr, a genergtic graphical distributed debugger with language support for application interfacing
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.Includes bibliographical references (leaves 84-86).by Shakil A. Chunawala.M.S
Document recognition of printed scores and transformation into MIDI
The processing of printed music pieces on paper images is an interesting application to analyze printed information by a computer. The music notation presented on paper should be recognized and reproduced. Numerous methods of image processing and knowledge-based procedures are necessary. The DOREMIDI System allows the processing of simple piano music pieces for two hands characterized by the following steps:
- Scanning paper images
- Processing of binary image data into basic components
- Knowledge-based analysis and symbolic representation of a musical score
- Visual and acoustic reproduction of the results.
DOREMIDI has been realized on a Macintosh II, using Common-Lisp (Clos) programming language. The user interface is equivalent to the common Macintosh-interface, which enables in an uncomplicated way to use windows and menus. A keyboard presents the results of the acoustical reproduction
- …