11,724 research outputs found

    On the hardness of switching to a small number of edges

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    Seidel's switching is a graph operation which makes a given vertex adjacent to precisely those vertices to which it was non-adjacent before, while keeping the rest of the graph unchanged. Two graphs are called switching-equivalent if one can be made isomorphic to the other one by a sequence of switches. Jel\'inkov\'a et al. [DMTCS 13, no. 2, 2011] presented a proof that it is NP-complete to decide if the input graph can be switched to contain at most a given number of edges. There turns out to be a flaw in their proof. We present a correct proof. Furthermore, we prove that the problem remains NP-complete even when restricted to graphs whose density is bounded from above by an arbitrary fixed constant. This partially answers a question of Matou\v{s}ek and Wagner [Discrete Comput. Geom. 52, no. 1, 2014].Comment: 19 pages, 7 figures. An extended abstract submitted to COCOON 201

    Pre-Reduction Graph Products: Hardnesses of Properly Learning DFAs and Approximating EDP on DAGs

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    The study of graph products is a major research topic and typically concerns the term f(G∗H)f(G*H), e.g., to show that f(G∗H)=f(G)f(H)f(G*H)=f(G)f(H). In this paper, we study graph products in a non-standard form f(R[G∗H]f(R[G*H] where RR is a "reduction", a transformation of any graph into an instance of an intended optimization problem. We resolve some open problems as applications. (1) A tight n1−ϵn^{1-\epsilon}-approximation hardness for the minimum consistent deterministic finite automaton (DFA) problem, where nn is the sample size. Due to Board and Pitt [Theoretical Computer Science 1992], this implies the hardness of properly learning DFAs assuming NP≠RPNP\neq RP (the weakest possible assumption). (2) A tight n1/2−ϵn^{1/2-\epsilon} hardness for the edge-disjoint paths (EDP) problem on directed acyclic graphs (DAGs), where nn denotes the number of vertices. (3) A tight hardness of packing vertex-disjoint kk-cycles for large kk. (4) An alternative (and perhaps simpler) proof for the hardness of properly learning DNF, CNF and intersection of halfspaces [Alekhnovich et al., FOCS 2004 and J. Comput.Syst.Sci. 2008]

    On Computing the Maximum Parsimony Score of a Phylogenetic Network

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    Phylogenetic networks are used to display the relationship of different species whose evolution is not treelike, which is the case, for instance, in the presence of hybridization events or horizontal gene transfers. Tree inference methods such as Maximum Parsimony need to be modified in order to be applicable to networks. In this paper, we discuss two different definitions of Maximum Parsimony on networks, "hardwired" and "softwired", and examine the complexity of computing them given a network topology and a character. By exploiting a link with the problem Multicut, we show that computing the hardwired parsimony score for 2-state characters is polynomial-time solvable, while for characters with more states this problem becomes NP-hard but is still approximable and fixed parameter tractable in the parsimony score. On the other hand we show that, for the softwired definition, obtaining even weak approximation guarantees is already difficult for binary characters and restricted network topologies, and fixed-parameter tractable algorithms in the parsimony score are unlikely. On the positive side we show that computing the softwired parsimony score is fixed-parameter tractable in the level of the network, a natural parameter describing how tangled reticulate activity is in the network. Finally, we show that both the hardwired and softwired parsimony score can be computed efficiently using Integer Linear Programming. The software has been made freely available

    Trains, Games, and Complexity: 0/1/2-Player Motion Planning through Input/Output Gadgets

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    We analyze the computational complexity of motion planning through local "input/output" gadgets with separate entrances and exits, and a subset of allowed traversals from entrances to exits, each of which changes the state of the gadget and thereby the allowed traversals. We study such gadgets in the 0-, 1-, and 2-player settings, in particular extending past motion-planning-through-gadgets work to 0-player games for the first time, by considering "branchless" connections between gadgets that route every gadget's exit to a unique gadget's entrance. Our complexity results include containment in L, NL, P, NP, and PSPACE; as well as hardness for NL, P, NP, and PSPACE. We apply these results to show PSPACE-completeness for certain mechanics in Factorio, [the Sequence], and a restricted version of Trainyard, improving prior results. This work strengthens prior results on switching graphs and reachability switching games.Comment: 37 pages, 36 figure

    Novel Test Fixture for Characterizing MEMS Switch Microcontact Reliability and Performance

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    In microelectromechanical systems (MEMS) switches, the microcontact is crucial in determining reliability and performance. In the past, actual MEMS devices and atomic force microscopes (AFM)/scanning probe microscopes (SPM)/nanoindentation-based test fixtures have been used to collect relevant microcontact data. In this work, we designed a unique microcontact support structure for improved post-mortem analysis. The effects of contact closure timing on various switching conditions (e.g., cold-switching and hot-switching) was investigated with respect to the test signal. Mechanical contact closing time was found to be approximately 1 us for the contact force ranging from 10–900 μN. On the other hand, for the 1 V and 10 mA circuit condition, electrical contact closing time was about 0.2 ms. The test fixture will be used to characterize contact resistance and force performance and reliability associated with wide range of contact materials and geometries that will facilitate reliable, robust microswitch designs for future direct current (DC) and radio frequency (RF) applications

    Paradigm and Paradox in Topology Control of Power Grids

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    Corrective Transmission Switching can be used by the grid operator to relieve line overloading and voltage violations, improve system reliability, and reduce system losses. Power grid optimization by means of line switching is typically formulated as a mixed integer programming problem (MIP). Such problems are known to be computationally intractable, and accordingly, a number of heuristic approaches to grid topology reconfiguration have been proposed in the power systems literature. By means of some low order examples (3-bus systems), it is shown that within a reasonably large class of greedy heuristics, none can be found that perform better than the others across all grid topologies. Despite this cautionary tale, statistical evidence based on a large number of simulations using using IEEE 118- bus systems indicates that among three heuristics, a globally greedy heuristic is the most computationally intensive, but has the best chance of reducing generation costs while enforcing N-1 connectivity. It is argued that, among all iterative methods, the locally optimal switches at each stage have a better chance in not only approximating a global optimal solution but also greatly limiting the number of lines that are switched
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