Performance enhancement for LTE and beyond systems

A thesis submitted to the University of Bedfordshire, in partial fulfilment of the requirements for the degree of Doctor of PhilosophyWireless communication systems have undergone fast development in recent years. Based on GSM/EDGE and UMTS/HSPA, the 3rd Generation Partnership Project (3GPP) specified the Long Term Evolution (LTE) standard to cope with rapidly increasing demands, including capacity, coverage, and data rate. To achieve this goal, several key techniques have been adopted by LTE, such as Multiple-Input and Multiple-Output (MIMO), Orthogonal Frequency-Division Multiplexing (OFDM), and heterogeneous network (HetNet). However, there are some inherent drawbacks regarding these techniques. Direct conversion architecture is adopted to provide a simple, low cost transmitter solution. The problem of I/Q imbalance arises due to the imperfection of circuit components; the orthogonality of OFDM is vulnerable to carrier frequency offset (CFO) and sampling frequency offset (SFO). The doubly selective channel can also severely deteriorate the receiver performance. In addition, the deployment of Heterogeneous Network (HetNet), which permits the co-existence of macro and pico cells, incurs inter-cell interference for cell edge users. The impact of these factors then results in significant degradation in relation to system performance. This dissertation aims to investigate the key techniques which can be used to mitigate the above problems. First, I/Q imbalance for the wideband transmitter is studied and a self-IQ-demodulation based compensation scheme for frequencydependent (FD) I/Q imbalance is proposed. This combats the FD I/Q imbalance by using the internal diode of the transmitter and a specially designed test signal without any external calibration instruments or internal low-IF feedback path. The instrument test results show that the proposed scheme can enhance signal quality by 10 dB in terms of image rejection ratio (IRR). In addition to the I/Q imbalance, the system suffers from CFO, SFO and frequency-time selective channel. To mitigate this, a hybrid optimum OFDM receiver with decision feedback equalizer (DFE) to cope with the CFO, SFO and doubly selective channel. The algorithm firstly estimates the CFO and channel frequency response (CFR) in the coarse estimation, with the help of hybrid classical timing and frequency synchronization algorithms. Afterwards, a pilot-aided polynomial interpolation channel estimation, combined with a low complexity DFE scheme, based on minimum mean squared error (MMSE) criteria, is developed to alleviate the impact of the residual SFO, CFO, and Doppler effect. A subspace-based signal-to-noise ratio (SNR) estimation algorithm is proposed to estimate the SNR in the doubly selective channel. This provides prior knowledge for MMSE-DFE and automatic modulation and coding (AMC). Simulation results show that this proposed estimation algorithm significantly improves the system performance. In order to speed up algorithm verification process, an FPGA based co-simulation is developed. Inter-cell interference caused by the co-existence of macro and pico cells has a big impact on system performance. Although an almost blank subframe (ABS) is proposed to mitigate this problem, the residual control signal in the ABS still inevitably causes interference. Hence, a cell-specific reference signal (CRS) interference cancellation algorithm, utilizing the information in the ABS, is proposed. First, the timing and carrier frequency offset of the interference signal is compensated by utilizing the cross-correlation properties of the synchronization signal. Afterwards, the reference signal is generated locally and channel response is estimated by making use of channel statistics. Then, the interference signal is reconstructed based on the previous estimate of the channel, timing and carrier frequency offset. The interference is mitigated by subtracting the estimation of the interference signal and LLR puncturing. The block error rate (BLER) performance of the signal is notably improved by this algorithm, according to the simulation results of different channel scenarios. The proposed techniques provide low cost, low complexity solutions for LTE and beyond systems. The simulation and measurements show good overall system performance can be achieved

An 8-DPSK TCM modem for MSAT-X

This paper describes the real-time digital implementation of an 8-differentiated phase-shift keying (DPSK) trellis-coded modulation (TCM) modem for operation on an L-band, 5 kHz wide, land mobile satellite (LMS) channel. The modem architecture as well as some of the signal processing techniques employed in the modem to combat the LMS channel impairments are described, and the modem performance over the fading channel is presented

On Time-Interleaved Analog-to-Digital Converters for Digital Transceivers

This paper presents a transceiver model that comprises two time-interleaved analog-to-digital (A/D) converter systems to sample the inphase and quadrature signals in a digital receiver. Random data is used as the information signal and quadrature modulation is employed as the modulation scheme. A polyphase filter bank is derived as a representation of the time-interleaved A/D converter system, thereby modelling its converter mismatch. Furthermore, filter bank theory is used to design reconstruction filters that mitigate aliasing and distortion and achieve matched filtering in a single post-processing scheme, therefore reducing the digital implementation complexity of the receiver. Simulations results are presented to illustrate the performance degradation due the usage of non-ideal A/D converters and to verify the propose reconstruction scheme. Finally, an analysis of the required synthesis filter complexity is presented for different error magnitudes as a guideline for the filter bank design

Modem design for digital satellite communications

The thesis is concerned with the design of a phase-shift keying system for a digital modem, operating over a satellite link. Computer simulation tests and theoretical analyses are used to assess the proposed design. The optimum design of both transmitter and receiver filters for the system to be used in the modem are discussed. Sinusoidal roll-off spectrum with different roll-off factor and optimum truncation lengths of the sample impulse response are designed for the proposed scheme to approximate to the theoretical ideal. It has used an EF bandpass filter to band limit the modulated signal, which forms part of the satellite channel modelling. The high power amplifier (HPA) at the earth station has been used in the satellite channel modelling due to its effect in introducing nonlinear AMAM and AM-PM conversion effects and distortion on the transmitted signal from the earth station. The satellite transponder is assumed to be operating in a linear mode. Different phase-shift keying signals such as differentially encoded quaternary phase-shift keying (DEQPSK), offset quaternary phase-shift keying (OQPSK) and convolutionally encoded 8PSK (CE8PSK) signals are analysed and discussed in the thesis, when the high power amplifier (HPA) at the earth station is operating in a nonlinear mode. Convolutional encoding is discussed when applied to the system used in the modem, and a Viterbi -algorithm decoder at the receiver has been used, for CE8PSK signals for a nonlinear satellite channel. A method of feed-forward synchronisation scheme is designed for carrier recovery in CE8PSK receiver. The thesis describes a method of baseband linearizing the baseband signal in order to reduce the nonlinear effects caused by the HPA at the earth station. The scheme which compensates for the nonlinear effects of the HPA by predistorting the baseband signal prior to modulation as opposed to correcting the distortion after modulation, thus reducing the effects of nonlinear distortion introduced by the HPA. The results of the improvement are presented. The advanced technology of digital signal processors (DSPs) has been used in the implementation of the demodulation and digital filtering parts of the modem replacing large parts of conventional circuits. The Viterbi-algorithm decoder for CE8PSK signals has been implemented using a digital signal processor chip, giving excellent performance and is a cost effective and easy way for future developments and any modifications, The results showed that, by using the various studied techniques, as well as the implementation of digital signal processor chip in parts of the modem, a potentially more cost effective modem can be obtained

Optical Delay Interferometers and their Application for Self-coherent Detection

Self-coherent receivers are promising candidates for reception of 100 Gbit/s data rates in optical networks. Self-coherent receivers consist of multiple optical delay interferometers (DI) with high-speed photodiodes attached to the outputs. By DSP of the photo currents it becomes possible to receive coherently modulated optical signals. Especially promising for 100 Gbit/s networks is the PolMUX DQPSK format, the self-coherent reception of which is described in detail

Programmable rate modem utilizing digital signal processing techniques

The engineering development study to follow was written to address the need for a Programmable Rate Digital Satellite Modem capable of supporting both burst and continuous transmission modes with either binary phase shift keying (BPSK) or quadrature phase shift keying (QPSK) modulation. The preferred implementation technique is an all digital one which utilizes as much digital signal processing (DSP) as possible. Here design tradeoffs in each portion of the modulator and demodulator subsystem are outlined, and viable circuit approaches which are easily repeatable, have low implementation losses and have low production costs are identified. The research involved for this study was divided into nine technical papers, each addressing a significant region of concern in a variable rate modem design. Trivial portions and basic support logic designs surrounding the nine major modem blocks were omitted. In brief, the nine topic areas were: (1) Transmit Data Filtering; (2) Transmit Clock Generation; (3) Carrier Synthesizer; (4) Receive AGC; (5) Receive Data Filtering; (6) RF Oscillator Phase Noise; (7) Receive Carrier Selectivity; (8) Carrier Recovery; and (9) Timing Recovery

Digital modems for mobile systems

Digital modems for mobile system

Design of SAW Filters with Diffraction Compensation

Coordinated Science Laboratory was formerly known as Control Systems LaboratoryJoint Services Electronics Program / DAAB-07-72-C-0259United States Air Force / F33615-75-C-1291Ope

Direct GMSK modulation at microwave frequencies

Congestion in the radio spectrum is forcing emerging high rate wireless communication systems into upper microwave and millimeterwave frequency bands, where transceiver hardware architectures are less mature. One way to realize a simple and elegant hardware solution for a microwave transmitter is to exploit the advantages of directly modulating the phase of the carrier signal. A modulation method requiring continuous phase control of the carrier signal over the full 360 degree range is Gaussian Minimum Shift Keying (GMSK). Unfortunately, it is very difficult to design a microwave circuit to provide linear phase control of a carrier signal over the full 360 degree range using traditional methods. A novel method of obtaining continuous, linear phase modulation of a microwave carrier signal over the full 360 degree range is proposed. This method is based on controlling a phase shifter, at a subharmonic of the desired output carrier frequency, and then using a frequency multiplier to obtain the desired output frequency. The phase shifter is designed to be highly linear over a fraction of the full 360 range. The frequency multiplier is a nonlinear circuit that shifts the frequency by *'N'. The subtle part of this nonlinear operation is that the multiplier also multiplies the instantaneous phase of the phase shifter output signal by *'N', thus expanding the linear phase shift range to the required 360 degrees. Using this nonlinear frequency multiplication principle, the modulator can readily be extended into the millimeterwave region. A prototype circuit is designed and performance results are presented for this method of carrier phase modulation at 18 GHz. The prototype circuit is realized with very simple hardware, containing only a single microwave active device. An extension to the modulator involving phase locking or injection locking of a power oscillator is also suggested for obtaining higher power modulated output signals. In addition to direct continuous phase modulation, the proposed method is also suitable for a wide variety of transceiver applications, including phase synchronization of antenna and oscillator arrays, phased array antenna beam steering, indirect frequency modulation, and ultra-small carrier frequency translation