18 research outputs found
Elementary Number Theory
Конспект лекцій та контрольні завдання для студентів напрямів підготовки 6.04030101 „Прикладна математика” та 6.040302 „Інформатика” усіх форм навчання
Topics related to the sum of unitary divisors of an integer
A divisor d of n is said to be a unitary divisor if d and n/d are relatively prime. Let σ*(n) be the sum of the unitary divisors of n, and let σ(n) be the sum of all the divisors of n. Some of the topics of classical number theory which involve σ(n) are investigated with the function σ replaced by σ*.
An integer n is said to be unitary perfect if σ*(n) = 2n ; some new results concerning such numbers are presented in Chapter II.
Two integers n and m are unitary amicable if they satisfy n + m = σ*(n) = σ*(m) Several theorems concerning unitary amicable numbers are proved in Chapter II, and an appendix lists 610 pairs of unitary amicable numbers.
Let D{X} be the asymptotic density of the set X of integers. It is known that the density function A(x) = D { n : σ(n)/n \u3ex } ,, exists and is continuous for all values of the real variable x. Let ψ be Dedekind\u27s function, ψ(n) = n p|n (1 + p ^-1) with the product over primes p which divide n. In Chapter III the existence and continuity of the density functions B(x) = D { n ψ(n)/n \u3ex } and C(x) = D { n : σ(n)/n \u3ex} is proved. In addition, upper and lower bounds are obtained for the functions B(x) and C(x) and, as a result, for A(x)
ONLY PROBLEMS, NOT SOLUTIONS!
The development of mathematics continues in a rapid rhythm, some unsolved problems are elucidated and simultaneously new open problems to be solved appear
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The life and work of Major Percy Alexander MacMahon
This thesis describes the life and work of the mathematician Major Percy Alexander MacMahon (1854 - 1929). His early life as a soldier in the Royal Artillery and events which led to him embarking on a career in mathematical research and teaching are dealt with in the first two chapters. Succeeding chapters explain the work in invariant theory and partition theory which brought him to the attention of the British mathematical community and eventually resulted in a Fellowship of the Royal Society, the presidency of the London Mathematical Society, and the award of three prestigious mathematical medals and four honorary doctorates. The development and importance of his recreational mathematical work is traced and discussed. MacMahon's career in the Civil Service as Deputy Warden of the Standards at the Board of Trade is also described. Throughout the thesis, his involvement with the British Association for the Advancement of Science and other scientific organisations is highlighted. The thesis also examines possible reasons why MacMahon's work, held in very high regard at the time, did not lead to the lasting fame accorded to some of his contemporaries. Details of his personal and social life are included to give a picture of MacMahon as a real person working hard to succeed in a difficult context
Orthogonal transforms and their application to image coding
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A high-speed integrated circuit with applications to RSA Cryptography
Merged with duplicate record 10026.1/833 on 01.02.2017 by CS (TIS)The rapid growth in the use of computers and networks in government, commercial and
private communications systems has led to an increasing need for these systems to be
secure against unauthorised access and eavesdropping. To this end, modern computer
security systems employ public-key ciphers, of which probably the most well known is the
RSA ciphersystem, to provide both secrecy and authentication facilities.
The basic RSA cryptographic operation is a modular exponentiation where the modulus
and exponent are integers typically greater than 500 bits long. Therefore, to obtain reasonable
encryption rates using the RSA cipher requires that it be implemented in hardware.
This thesis presents the design of a high-performance VLSI device, called the WHiSpER
chip, that can perform the modular exponentiations required by the RSA cryptosystem
for moduli and exponents up to 506 bits long. The design has an expected throughput
in excess of 64kbit/s making it attractive for use both as a general RSA processor within
the security function provider of a security system, and for direct use on moderate-speed
public communication networks such as ISDN.
The thesis investigates the low-level techniques used for implementing high-speed arithmetic
hardware in general, and reviews the methods used by designers of existing modular
multiplication/exponentiation circuits with respect to circuit speed and efficiency.
A new modular multiplication algorithm, MMDDAMMM, based on Montgomery arithmetic,
together with an efficient multiplier architecture, are proposed that remove the
speed bottleneck of previous designs.
Finally, the implementation of the new algorithm and architecture within the WHiSpER
chip is detailed, along with a discussion of the application of the chip to ciphering and key
generation
Design of microprocessor-based hardware for number theoretic transform implementation
Number Theoretic Transforms (NTTs) are defined in a finite ring of integers Z (_M), where M is the modulus. All the arithmetic operations are carried out modulo M. NTTs are similar in structure to DFTs, hence fast FFT type algorithms may be used to compute NTTs efficiently. A major advantage of the NTT is that it can be used to compute error free convolutions, unlike the FFT it is not subject to round off and truncation errors. In 1976 Winograd proposed a set of short length DFT algorithms using a fewer number of multiplications and approximately the same number of additions as the Cooley-Tukey FFT algorithm. This saving is accomplished at the expense of increased algorithm complexity. These short length DFT algorithms may be combined to perform longer transforms. The Winograd Fourier Transform Algorithm (WFTA) was implemented on a TMS9900 microprocessor to compute NTTs. Since multiplication conducted modulo M is very time consuming a special purpose external hardware modular multiplier was designed, constructed and interfaced with the TMS9900 microprocessor. This external hardware modular multiplier allowed an improvement in the transform execution time. Computation time may further be reduced by employing several microprocessors. Taking advantage of the inherent parallelism of the WFTA, a dedicated parallel microprocessor system was designed and constructed to implement a 15-point WFTA in parallel. Benchmark programs were written to choose a suitable microprocessor for the parallel microprocessor system. A master or a host microprocessor is used to control the parallel microprocessor system and provides an interface to the outside world. An analogue to digital (A/D) and a digital to analogue (D/A) converter allows real time digital signal processing