588 research outputs found
Waveforms for the Massive MIMO Downlink: Amplifier Efficiency, Distortion and Performance
In massive MIMO, most precoders result in downlink signals that suffer from
high PAR, independently of modulation order and whether single-carrier or OFDM
transmission is used. The high PAR lowers the power efficiency of the base
station amplifiers. To increase power efficiency, low-PAR precoders have been
proposed. In this article, we compare different transmission schemes for
massive MIMO in terms of the power consumed by the amplifiers. It is found that
(i) OFDM and single-carrier transmission have the same performance over a
hardened massive MIMO channel and (ii) when the higher amplifier power
efficiency of low-PAR precoding is taken into account, conventional and low-PAR
precoders lead to approximately the same power consumption. Since downlink
signals with low PAR allow for simpler and cheaper hardware, than signals with
high PAR, therefore, the results suggest that low-PAR precoding with either
single-carrier or OFDM transmission should be used in a massive MIMO base
station
Design and implementation of an ETSI-SDR OFDM transmitter with power amplifier linearizer
Satellite radio has attained great popularity because of its wide range of geographical coverage and high signal quality as compared to the terrestrial broadcasts. Most Satellite Digital Radio (SDR) based systems favor multi-carrier transmission schemes, especially, orthogonal frequency division multiplexing (OFDM) transmission because of high data transfer rate and spectral efficiency.
It is a challenging task to find a suitable platform that supports fast data rates and superior processing capabilities required for the development and deployment of the new SDR standards. Field programmable gate array (FPGA) devices have the potential to become suitable development platform for such standards. Another challenging factor in SDR systems is the distortion of variable envelope signals used in OFDM transmission by the nonlinear RF power amplifiers (PA) used in the base station transmitters. An attractive option is to use a linearizer that would compensate for the nonlinear effects of the PA.
In this research, an OFDM transmitter, according to European Telecommunications Standard Institute (ETSI) SDR Technical Specifications 2007-2008, was designed and implemented on a low-cost Xilinx FPGA platform. A weakly nonlinear PA, operating in the L-band SDR frequency (1.450-1.490GHz), was used for signal transmission. An FPGA-based, low-cost, adaptive linearizer was designed and implemented based on the digital predistortion (DPD) reference design from Xilinx, to correct the distortion effects of the PA on the transmitted signal
Quantifying Potential Energy Efficiency Gain in Green Cellular Wireless Networks
Conventional cellular wireless networks were designed with the purpose of
providing high throughput for the user and high capacity for the service
provider, without any provisions of energy efficiency. As a result, these
networks have an enormous Carbon footprint. In this paper, we describe the
sources of the inefficiencies in such networks. First we present results of the
studies on how much Carbon footprint such networks generate. We also discuss
how much more mobile traffic is expected to increase so that this Carbon
footprint will even increase tremendously more. We then discuss specific
sources of inefficiency and potential sources of improvement at the physical
layer as well as at higher layers of the communication protocol hierarchy. In
particular, considering that most of the energy inefficiency in cellular
wireless networks is at the base stations, we discuss multi-tier networks and
point to the potential of exploiting mobility patterns in order to use base
station energy judiciously. We then investigate potential methods to reduce
this inefficiency and quantify their individual contributions. By a
consideration of the combination of all potential gains, we conclude that an
improvement in energy consumption in cellular wireless networks by two orders
of magnitude, or even more, is possible.Comment: arXiv admin note: text overlap with arXiv:1210.843
Adjustable dynamic range for paper reduction schemes in large-scale MIMO-OFDM systems
In a multi-input-multi-output (MIMO) communication system there is a necessity to limit the power that the output antenna amplifiers can deliver. Their signal is a
combination of many independent channels, so the demanded amplitude can peak to many times the average value. The orthogonal frequency division multiplexing
(OFDM) system causes high peak signals to occur because many subcarrier components are added by an inverse discrete Fourier transformation process at the base station. This causes out-of-band spectral regrowth. If simple clipping of the input signal is used, there will be in-band distortions in the transmitted signals and the bit error rate will increase substantially.
This work presents a novel technique that reduces the peak-to-average power ratio (PAPR). It is a combination of two main stages, a variable clipping level and an
Adaptive Optimizer that takes advantage of the channel state information sent from all users in the cell.
Simulation results show that the proposed method achieves a better overall system performance than that of conventional peak reduction systems in terms of the symbol
error rate. As a result, the linear output of the power amplifiers can be minimized with a great saving in cost
Near-Instantaneously Adaptive HSDPA-Style OFDM Versus MC-CDMA Transceivers for WIFI, WIMAX, and Next-Generation Cellular Systems
Burts-by-burst (BbB) adaptive high-speed downlink packet access (HSDPA) style multicarrier systems are reviewed, identifying their most critical design aspects. These systems exhibit numerous attractive features, rendering them eminently eligible for employment in next-generation wireless systems. It is argued that BbB-adaptive or symbol-by-symbol adaptive orthogonal frequency division multiplex (OFDM) modems counteract the near instantaneous channel quality variations and hence attain an increased throughput or robustness in comparison to their fixed-mode counterparts. Although they act quite differently, various diversity techniques, such as Rake receivers and space-time block coding (STBC) are also capable of mitigating the channel quality variations in their effort to reduce the bit error ratio (BER), provided that the individual antenna elements experience independent fading. By contrast, in the presence of correlated fading imposed by shadowing or time-variant multiuser interference, the benefits of space-time coding erode and it is unrealistic to expect that a fixed-mode space-time coded system remains capable of maintaining a near-constant BER
A digital polar transmitter for multi-band OFDM Ultra-WideBand
Linear power amplifiers used to implement the Ultra-Wideband standard must be
backed off from optimum power efficiency to meet the standard specifications and
the power efficiency suffers. The problem of low efficiency can be mitigated by polar
modulation. Digital polar architectures have been employed on numerous wireless
standards like GSM, EDGE, and WLAN, where the fractional bandwidths achieved
are only about 1%, and the power levels achieved are often in the vicinity of 20 dBm.
Can the architecture be employed on wireless standards with low-power and high
fractional bandwidth requirements and yet achieve good power efficiency?
To answer these question, this thesis studies the application of a digital polar transmitter
architecture with parallel amplifier stages for UWB. The concept of the digital
transmitter is motivated and inspired by three factors. First, unrelenting advances
in the CMOS technology in deep-submicron process and the prevalence of low-cost
Digital Signal processing have resulted in the realization of higher level of integration
using digitally intensive approaches. Furthermore, the architecture is an evolution
of polar modulation, which is known for high power efficiency in other wireless applications.
Finally, the architecture is operated as a digital-to-analog converter which
circumvents the use of converters in conventional transmitters.
Modeling and simulation of the system architecture is performed on the Agilent Advanced
Design System Ptolemy simulation platform. First, by studying the envelope
signal, we found that envelope clipping results in a reduction in the peak-to-average
power ratio which in turn improves the error vector magnitude performance (figure
of merit for the study). In addition, we have demonstrated that a resolution of three
bits suffices for the digital polar transmitter when envelope clipping is performed.
Next, this thesis covers a theoretical derivation for the estimate of the error vector
magnitude based on the resolution, quantization and phase noise errors. An analysis
on the process variations - which result in gain and delay mismatches - for a
digital transmitter architecture with four bits ensues. The above studies allow RF
designers to estimate the number of bits required and the amount of distortion that
can be tolerated in the system.
Next, a study on the circuit implementation was conducted. A DPA that comprises
7 parallel RF amplifiers driven by a constant RF phase-modulated signal and 7
cascode transistors (individually connected in series with the bottom amplifiers)
digitally controlled by a 3-bit digitized envelope signal to reconstruct the UWB
signal at the output. Through the use of NFET models from the IBM 130-nm
technology, our simulation reveals that our DPA is able to achieve an EVM of -
22 dB. The DPA simulations have been performed at 3.432 GHz centre frequency
with a channel bandwidth of 528 MHz, which translates to a fractional bandwidth
of 15.4%. Drain efficiencies of 13.2/19.5/21.0% have been obtained while delivering
-1.9/2.5/5.5 dBm of output power and consuming 5/9/17 mW of power.
In addition, we performed a yield analysis on the digital polar amplifier, based
on unit-weighted and binary-weighted architecture, when gain variations are introduced
in all the individual stages. The dynamic element matching method is also
introduced for the unit-weighted digital polar transmitter. Monte Carlo simulations
reveal that when the gain of the amplifiers are allowed to vary at a mean of 1 with a
standard deviation of 0.2, the binary-weighted architecture obtained a yield of 79%,
while the yields of the unit-weighted architectures are in the neighbourhood of 95%.
Moreover, the dynamic element matching technique demonstrates an improvement
in the yield by approximately 3%.
Finally, a hardware implementation for this architecture based on software-defined
arbitrary waveform generators is studied. In this section, we demonstrate that the error vector magnitude results obtained with a four-stage binary-weighted digital polar
transmitter under ideal combining conditions fulfill the European Computer Manufacturers
Association requirements. The proposed experimental setup, believed to
be the first ever attempted, confirm the feasibility of a digital polar transmitter architecture
for Ultra-Wideband. In addition, we propose a number of power combining
techniques suitable for the hardware implementation. Spatial power combining, in
particular, shows a high potential for the digital polar transmitter architecture.
The above studies demonstrate the feasibility of the digital polar architecture with
good power efficiency for a wideband wireless standard with low-power and high
fractional bandwidth requirements
Broadband Class-J GaN Doherty Power Amplifier
This paper presents a broadband 3 GHzâ3.7GHz class-J Doherty power amplifier exploiting second harmonic tuning in the output network. Furthermore, the output impedance inverter is eliminated and its effect is embedded in the main deviceâs output matching network, thus trading off among bandwidth, efficiency, and gain. The proposed amplifier adopts two 10W packaged GaN transistors, and it achieves in measurement 60â74%, and 46â50% drain efficiency at saturation and 6 dB output back-off, respectively, with a saturated output power of 43 dBmâ44.2dBm and a small-signal gain of 10 dBâ13 dB. The proposed DPA exhibits a simulated adjacent channel power ratio less than 30 dBc at 36dBm average output power when a 16-QAM modulation with 5 MHz bandwidth is applied to the 3.5 GHz carrier
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