On the Stability of Isolated and Interconnected Input-Queued Switches under Multiclass Traffic

In this correspondence, we discuss the stability of scheduling algorithms for input-queueing (IQ) and combined input/output queueing (CIOQ) packet switches. First, we show that a wide class of IQ schedulers operating on multiple traffic classes can achieve 100 % throughput. Then, we address the problem of the maximum throughput achievable in a network of interconnected IQ switches and CIOQ switches loaded by multiclass traffic, and we devise some simple scheduling policies that guarantee 100 % throughput. Both the Lyapunov function methodology and the fluid modeling approach are used to obtain our results

Disengaged Scheduling for Fair, Protected Access to Fast Computational Accelerators

Today’s operating systems treat GPUs and other computational accelerators as if they were simple devices, with bounded and predictable response times. With accelerators assuming an increasing share of the workload on modern machines, this strategy is already problematic, and likely to become untenable soon. If the operating system is to enforce fair sharing of the machine, it must assume responsibility for accelerator scheduling and resource management. Fair, safe scheduling is a particular challenge on fast accelerators, which allow applications to avoid kernel-crossing overhead by interacting directly with the device. We propose a disengaged scheduling strategy in which the kernel intercedes between applications and the accelerator on an infrequent basis, to monitor their use of accelerator cycles and to determine which applications should be granted access over the next time interval. Our strategy assumes a well defined, narrow interface exported by the accelerator. We build upon such an interface, systematically inferred for the latest Nvidia GPUs. We construct several example schedulers, including Disengaged Timeslice with overuse control that guarantees fairness and Disengaged Fair Queueing that is effective in limiting resource idleness, but probabilistic. Both schedulers ensure fair sharing of the GPU, even among uncooperative or adversarial applications; Disengaged Fair Queueing incurs a 4 % overhead on average (max 18%) compared to direct devic

A Novel Voice Priority Queue (VPQ) Schedule and Algorithm for VoIP over WLAN Network

The VoIP deployment on Wireless Local Area Networks (WLANs), which is based on IEEE 802.11 standards, is increasing. Currently, many schedulers have been introduced such as Weighted Fair Queueing (WFQ), Strict Priority (SP) General processor sharing (GPS), Deficit Round Robin (DRR), and Contention-Aware Temporally fair Scheduling (CATS). Unfortunately, the current scheduling techniques have some drawbacks on real-time applications and therefore will not be able to handle the VoIP packets in a proper way. The objective of this research is to propose a new scheduler system model for the VoIP application named final stage of Voice Priority Queue (VPQ) scheduler. The scheduler system model is to ensure efficiency by producing a higher throughput and fairness for VoIP packets. In this paper, only the final Stage of the VPQ packet scheduler and its algorithm are presented. Simulation topologies for VoIP traffic were implemented and analyzed using the Network Simulator (NS-2). The results show that this method can achieve a better and more accurate VoIP quality throughput and fairness index over WLANs