13,300 research outputs found

    Comparison analysis of stream cipher algorithms for digital communication

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    The broadcast nature of radio communication such as in the HF (High Frequency) spectrum exposes the transmitted information to unauthorized third parties. Confidentiality is ensured by employing cipher system. For bulk transmission of data, stream ciphers are ideal choices over block ciphers due to faster implementation speed and not introducing error propagation. The stream cipher algorithms evaluated are based on the linear feedback shift register (LFSR) with nonlinear combining function. By using a common key length and worst case conditions, the strength of several stream cipher algorithms are evaluated using statistical tests, correlation attack, linear complexity profile and nonstandard test. The best algorithm is the one that exceeds all of the tests

    Analysis of Internally Bandlimited Multistage Cubic-Term Generators for RF Receivers

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    Adaptive feedforward error cancellation applied to correct distortion arising from third-order nonlinearities in RF receivers requires low-noise low-power reference cubic nonidealities. Multistage cubic-term generators utilizing cascaded nonlinear operations are ideal in this regard, but the frequency response of the interstage circuitry can introduce errors into the cubing operation. In this paper, an overview of the use of cubic-term generators in receivers relative to other applications is presented. An interstage frequency response plan is presented for a receiver cubic-term generator and is shown to function for arbitrary three-signal third-order intermodulation generation. The noise of such circuits is also considered and is shown to depend on the total incoming signal power across a particular frequency band. Finally, the effects of the interstage group delay are quantified in the context of a relevant communication standard requirement

    Contour Detector and Data Acquisition System for the Left Ventricular Outline

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    A real-time contour detector and data acquisition system is described for an angiographic apparatus having a video scanner for converting an X-ray image of a structure characterized by a change in brightness level compared with its surrounding into video format and displaying the X-ray image in recurring video fields. The real-time contour detector and data acqusition system includes track and hold circuits; a reference level analog computer circuit; an analog compartor; a digital processor; a field memory; and a computer interface

    BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing

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    Matrix-matrix multiplication is a key computational kernel for numerous applications in science and engineering, with ample parallelism and data locality that lends itself well to high-performance implementations. Many matrix multiplication-dependent applications can use reduced-precision integer or fixed-point representations to increase their performance and energy efficiency while still offering adequate quality of results. However, precision requirements may vary between different application phases or depend on input data, rendering constant-precision solutions ineffective. We present BISMO, a vectorized bit-serial matrix multiplication overlay for reconfigurable computing. BISMO utilizes the excellent binary-operation performance of FPGAs to offer a matrix multiplication performance that scales with required precision and parallelism. We characterize the resource usage and performance of BISMO across a range of parameters to build a hardware cost model, and demonstrate a peak performance of 6.5 TOPS on the Xilinx PYNQ-Z1 board.Comment: To appear at FPL'1
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