1,752 research outputs found
The Melbourne Shuffle: Improving Oblivious Storage in the Cloud
We present a simple, efficient, and secure data-oblivious randomized shuffle
algorithm. This is the first secure data-oblivious shuffle that is not based on
sorting. Our method can be used to improve previous oblivious storage solutions
for network-based outsourcing of data
A systematic analysis of equivalence in multistage networks
Many approaches to switching in optoelectronic and optical networks decompose the switching function across multiple stages or hops. This paper addresses the problem of determining whether two multistage or multihop networks are functionally equivalent. Various ad-hoc methods have been used in the past to establish such equivalences. A systematic method for determining equivalence is presented based on properties of the link permutations used to interconnect stages of the network. This method is useful in laying out multistage networks, in determining optimal channel assignments for multihop networks, and in establishing the routing required in such networks. A purely graphical variant of the method, requiring no mathematics or calculations, is also described
Solving the Corner-Turning Problem for Large Interferometers
The so-called corner turning problem is a major bottleneck for radio
telescopes with large numbers of antennas. The problem is essentially that of
rapidly transposing a matrix that is too large to store on one single device;
in radio interferometry, it occurs because data from each antenna needs to be
routed to an array of processors that will each handle a limited portion of the
data (a frequency range, say) but requires input from each antenna. We present
a low-cost solution allowing the correlator to transpose its data in real time,
without contending for bandwidth, via a butterfly network requiring neither
additional RAM memory nor expensive general-purpose switching hardware. We
discuss possible implementations of this using FPGA, CMOS, analog logic and
optical technology, and conclude that the corner turner cost can be small even
for upcoming massive radio arrays.Comment: Revised to match accepted MNRAS version. 7 pages, 4 fig
Reducing branch delay to zero in pipelined processors
A mechanism to reduce the cost of branches in pipelined processors is described and evaluated. It is based on the use of multiple prefetch, early computation of the target address, delayed branch, and parallel execution of branches. The implementation of this mechanism using a branch target instruction memory is described. An analytical model of the performance of this implementation makes it possible to measure the efficiency of the mechanism with a very low computational cost. The model is used to determine the size of cache lines that maximizes the processor performance, to compare the performance of the mechanism with that of other schemes, and to analyze the performance of the mechanism with two alternative cache organizations.Peer ReviewedPostprint (published version
On Money as a Means of Coordination between Network Packets
In this work, we apply a common economic tool, namely money, to coordinate
network packets. In particular, we present a network economy, called
PacketEconomy, where each flow is modeled as a population of rational network
packets, and these packets can self-regulate their access to network resources
by mutually trading their positions in router queues. Every packet of the
economy has its price, and this price determines if and when the packet will
agree to buy or sell a better position. We consider a corresponding Markov
model of trade and show that there are Nash equilibria (NE) where queue
positions and money are exchanged directly between the network packets. This
simple approach, interestingly, delivers improvements even when fiat money is
used. We present theoretical arguments and experimental results to support our
claims
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