On Symmetric Circuits and Fixed-Point Logics

We study properties of relational structures, such as graphs, that are decided by families of Boolean circuits. Circuits that decide such properties are necessarily invariant to permutations of the elements of the input structures. We focus on families of circuits that are symmetric, i.e., circuits whose invariance is witnessed by automorphisms of the circuit induced by the permutation of the input structure. We show that the expressive power of such families is closely tied to definability in logic. In particular, we show that the queries defined on structures by uniform families of symmetric Boolean circuits with majority gates are exactly those definable in fixed-point logic with counting. This shows that inexpressibility results in the latter logic lead to lower bounds against polynomial-size families of symmetric circuits.This research was supported by EPSRC grant EP/H026835

The stochastic behavior of a molecular switching circuit with feedback

Background: Using a statistical physics approach, we study the stochastic switching behavior of a model circuit of multisite phosphorylation and dephosphorylation with feedback. The circuit consists of a kinase and phosphatase acting on multiple sites of a substrate that, contingent on its modification state, catalyzes its own phosphorylation and, in a symmetric scenario, dephosphorylation. The symmetric case is viewed as a cartoon of conflicting feedback that could result from antagonistic pathways impinging on the state of a shared component. Results: Multisite phosphorylation is sufficient for bistable behavior under feedback even when catalysis is linear in substrate concentration, which is the case we consider. We compute the phase diagram, fluctuation spectrum and large-deviation properties related to switch memory within a statistical mechanics framework. Bistability occurs as either a first-order or second-order non-equilibrium phase transition, depending on the network symmetries and the ratio of phosphatase to kinase numbers. In the second-order case, the circuit never leaves the bistable regime upon increasing the number of substrate molecules at constant kinase to phosphatase ratio. Conclusions: The number of substrate molecules is a key parameter controlling both the onset of the bistable regime, fluctuation intensity, and the residence time in a switched state. The relevance of the concept of memory depends on the degree of switch symmetry, as memory presupposes information to be remembered, which is highest for equal residence times in the switched states. Reviewers: This article was reviewed by Artem Novozhilov (nominated by Eugene Koonin), Sergei Maslov, and Ned Wingreen.Comment: Version published in Biology Direct including reviewer comments and author responses, 28 pages, 7 figure

Symmetric Arithmetic Circuits.

We introduce symmetric arithmetic circuits, i.e. arithmetic circuits with a natural symmetry restriction. In the context of circuits computing polynomials defined on a matrix of variables, such as the determinant or the permanent, the restriction amounts to requiring that the shape of the circuit is invariant under row and column permutations of the matrix. We establish unconditional, nearly exponential, lower bounds on the size of any symmetric circuit for computing the permanent over any field of characteristic other than 2. In contrast, we show that there are polynomial-size symmetric circuits for computing the determinant over fields of characteristic zero

Switched Capacitor DC-DC Converter for Miniaturised Wearable Systems

Motivated by the demands of the integrated power system in the modern wearable electronics, this paper presents a new method of inductor-less switched-capacitor (SC) based DC-DC converter designed to produce two simultaneous boost and buck outputs by using a 4-phases logic switch mode regulation. While the existing SC converters missing their reconfigurability during needed spontaneous multi-outputs at the load ends, this work overcomes this limitation by being able to reconfigure higher gain mode at dual outputs. From an input voltage of 2.5 V, the proposed converter achieves step-up and step-down voltage conversions of 3.74 V and 1.233 V for Normal mode, and 4.872 V and 2.48 V for High mode, with the ripple variation of 20–60 mV. The proposed converter has been designed in a standard 0.35 μm CMOS technology and with conversion efficiencies up to 97–98% is in agreement with state-of-the-art SC converter designs. It produces the maximum load currents of 0.21 mA and 0.37 mA for Normal and High modes respectively. Due to the flexible gain accessibility and fast response time with only two clock cycles required for steady state outputs, this converter can be applicable for multi-function wearable devices, comprised of various integrated electronic modules

On the power of symmetric linear programs

We consider families of symmetric linear programs (LPs) that decide a property of graphs (or other relational structures) in the sense that, for each size of graph, there is an LP defining a polyhedral lift that separates the integer points corresponding to graphs with the property from those corresponding to graphs without the property. We show that this is equivalent, with at most polynomial blow-up in size, to families of symmetric Boolean circuits with threshold gates. In particular, when we consider polynomial-size LPs, the model is equivalent to definability in a non-uniform version of fixed-point logic with counting (FPC). Known upper and lower bounds for FPC apply to the non-uniform version. In particular, this implies that the class of graphs with perfect matchings has polynomial-size symmetric LPs while we obtain an exponential lower bound for symmetric LPs for the class of Hamiltonian graphs. We compare and contrast this with previous results (Yannakakis 1991) showing that any symmetric LPs for the matching and TSP polytopes have exponential size. As an application, we establish that for random, uniformly distributed graphs, polynomial-size symmetric LPs are as powerful as general Boolean circuits. We illustrate the effect of this on the well-studied planted-clique problem