6,293 research outputs found
Faster Mutation Analysis via Equivalence Modulo States
Mutation analysis has many applications, such as asserting the quality of
test suites and localizing faults. One important bottleneck of mutation
analysis is scalability. The latest work explores the possibility of reducing
the redundant execution via split-stream execution. However, split-stream
execution is only able to remove redundant execution before the first mutated
statement.
In this paper we try to also reduce some of the redundant execution after the
execution of the first mutated statement. We observe that, although many
mutated statements are not equivalent, the execution result of those mutated
statements may still be equivalent to the result of the original statement. In
other words, the statements are equivalent modulo the current state.
In this paper we propose a fast mutation analysis approach, AccMut. AccMut
automatically detects the equivalence modulo states among a statement and its
mutations, then groups the statements into equivalence classes modulo states,
and uses only one process to represent each class. In this way, we can
significantly reduce the number of split processes. Our experiments show that
our approach can further accelerate mutation analysis on top of split-stream
execution with a speedup of 2.56x on average.Comment: Submitted to conferenc
Π Π·Π°Π΄Π°ΡΠ΅ ΠΌΠΈΠ½ΠΈΠΌΠΈΠ·Π°ΡΠΈΠΈ ΠΏΠΎΡΠ»Π΅Π΄ΠΎΠ²Π°ΡΠ΅Π»ΡΠ½ΡΡ ΠΏΡΠΎΠ³ΡΠ°ΠΌΠΌ
First-order program schemata is one of the simplest models of sequential imperative programs intended for solving verification and optimization problems. We consider the decidable relation of logical-thermal equivalence of these schemata and the problem of their size minimization while preserving logical-thermal equivalence. We prove that this problem is decidable. Further we show that the first-order program schemata supplied with logical-thermal equivalence and finite state deterministic transducers operating over substitutions are mutually translated into each other. This relationship implies that the equivalence checking problem and the minimization problem for these transducers are also decidable. In addition, on the basis of the discovered relationship, we have found a subclass of firstorder program schemata such that their minimization can be performed in polynomial time by means of known techniques for minimization of finite state transducers operating over semigroups. Finally, we demonstrate that in general case the minimization problem for finite state transducers over semigroups may have several non-isomorphic solutions.Π‘ΡΠ°Π½Π΄Π°ΡΡΠ½ΡΠ΅ ΡΡ
Π΅ΠΌΡ ΠΏΡΠΎΠ³ΡΠ°ΠΌΠΌ β ΡΡΠΎ ΠΎΠ΄Π½Π° ΠΈΠ· Π½Π°ΠΈΠ±ΠΎΠ»Π΅Π΅ ΠΏΡΠΎΡΡΡΡ
ΠΌΠΎΠ΄Π΅Π»Π΅ΠΉ ΠΏΠΎΡΠ»Π΅Π΄ΠΎΠ²Π°ΡΠ΅Π»ΡΠ½ΡΡ
ΠΈΠΌΠΏΠ΅ΡΠ°ΡΠΈΠ²Π½ΡΡ
ΠΏΡΠΎΠ³ΡΠ°ΠΌΠΌ, ΠΏΡΠ΅Π΄Π½Π°Π·Π½Π°ΡΠ΅Π½Π½Π°Ρ Π΄Π»Ρ ΡΠ΅ΡΠ΅Π½ΠΈΡ Π·Π°Π΄Π°Ρ ΠΎΠΏΡΠΈΠΌΠΈΠ·Π°ΡΠΈΠΈ ΠΈ Π²Π΅ΡΠΈΡΠΈΠΊΠ°ΡΠΈΠΈ ΠΏΡΠΎΠ³ΡΠ°ΠΌΠΌ. ΠΡ ΡΠ°ΡΡΠΌΠ°ΡΡΠΈΠ²Π°Π΅ΠΌ ΡΠ°Π·ΡΠ΅ΡΠΈΠΌΠΎΠ΅ ΠΎΡΠ½ΠΎΡΠ΅Π½ΠΈΠ΅ Π»ΠΎΠ³ΠΈΠΊΠΎ-ΡΠ΅ΡΠΌΠ°Π»ΡΠ½ΠΎΠΉ ΡΠΊΠ²ΠΈΠ²Π°Π»Π΅Π½ΡΠ½ΠΎΡΡΠΈ ΡΡΠ°Π½Π΄Π°ΡΡΠ½ΡΡ
ΡΡ
Π΅ΠΌ ΠΏΡΠΎΠ³ΡΠ°ΠΌΠΌ ΠΈ Π·Π°Π΄Π°ΡΡ ΠΌΠΈΠ½ΠΈΠΌΠΈΠ·Π°ΡΠΈΠΈ ΠΈΡ
ΡΠ°Π·ΠΌΠ΅ΡΠ° ΠΏΡΠΈ ΡΡΠ»ΠΎΠ²ΠΈΠΈ ΡΠΎΡ
ΡΠ°Π½Π΅Π½ΠΈΡ ΠΎΡΠ½ΠΎΡΠ΅Π½ΠΈΡ Π»ΠΎΠ³ΠΈΠΊΠΎ-ΡΠ΅ΡΠΌΠ°Π»ΡΠ½ΠΎΠΉ ΡΠΊΠ²ΠΈΠ²Π°Π»Π΅Π½ΡΠ½ΠΎΡΡΠΈ. ΠΠ°ΠΌΠΈ Π΄ΠΎΠΊΠ°Π·Π°Π½ΠΎ, ΡΡΠΎ ΡΡΠ° Π·Π°Π΄Π°ΡΠ° ΡΠ²Π»ΡΠ΅ΡΡΡ Π°Π»Π³ΠΎΡΠΈΡΠΌΠΈΡΠ΅ΡΠΊΠΈ ΡΠ°Π·ΡΠ΅ΡΠΈΠΌΠΎΠΉ. ΠΠ°Π»Π΅Π΅ ΠΏΠΎΠΊΠ°Π·Π°Π½ΠΎ, ΡΡΠΎ ΡΡΠ°Π½Π΄Π°ΡΡΠ½ΡΠ΅ ΡΡ
Π΅ΠΌΡ ΠΏΡΠΎΠ³ΡΠ°ΠΌΠΌ Ρ ΠΎΡΠ½ΠΎΡΠ΅Π½ΠΈΠ΅ΠΌ Π»ΠΎΠ³ΠΈΠΊΠΎ-ΡΠ΅ΡΠΌΠ°Π»ΡΠ½ΠΎΠΉ ΡΠΊΠ²ΠΈΠ²Π°Π»Π΅Π½ΡΠ½ΠΎΡΡΠΈ ΠΈ ΠΊΠΎΠ½Π΅ΡΠ½ΡΠ΅ Π΄Π΅ΡΠ΅ΡΠΌΠΈΠ½ΠΈΡΠΎΠ²Π°Π½Π½ΡΠ΅ Π°Π²ΡΠΎΠΌΠ°ΡΡ-ΠΏΡΠ΅ΠΎΠ±ΡΠ°Π·ΠΎΠ²Π°ΡΠ΅Π»ΠΈ, ΡΠ°Π±ΠΎΡΠ°ΡΡΠΈΠ΅ Π½Π°Π΄ ΠΏΠΎΠ»ΡΠ³ΡΡΠΏΠΏΠ°ΠΌΠΈ ΠΏΠΎΠ΄ΡΡΠ°Π½ΠΎΠ²ΠΎΠΊ, Π²Π·Π°ΠΈΠΌΠ½ΠΎ ΡΡΠ°Π½ΡΠ»ΠΈΡΡΡΡΡΡ Π΄ΡΡΠ³ Π² Π΄ΡΡΠ³Π°. ΠΡΡΡΠ΄Π° ΡΠ»Π΅Π΄ΡΠ΅Ρ, ΡΡΠΎ ΡΠ°ΠΊΠΆΠ΅ ΡΠ°Π·ΡΠ΅ΡΠΈΠΌΡ Π·Π°Π΄Π°ΡΠΈ ΠΏΡΠΎΠ²Π΅ΡΠΊΠΈ ΡΠΊΠ²ΠΈΠ²Π°Π»Π΅Π½ΡΠ½ΠΎΡΡΠΈ ΠΈ ΠΌΠΈΠ½ΠΈΠΌΠΈΠ·Π°ΡΠΈΠΈ Π΄Π»Ρ ΠΏΡΠ΅ΠΎΠ±ΡΠ°Π·ΠΎΠ²Π°ΡΠ΅Π»Π΅ΠΉ ΡΠΊΠ°Π·Π°Π½Π½ΠΎΠ³ΠΎ Π²ΠΈΠ΄Π°. ΠΡΠΎΠΌΠ΅ ΡΠΎΠ³ΠΎ, Π½Π° ΠΎΡΠ½ΠΎΠ²Π΅ ΠΎΠ±Π½Π°ΡΡΠΆΠ΅Π½Π½ΠΎΠΉ Π²Π·Π°ΠΈΠΌΠΎΡΠ²ΡΠ·ΠΈ Π²ΡΠ΄Π΅Π»Π΅Π½ ΠΏΠΎΠ΄ΠΊΠ»Π°ΡΡ ΡΡΠ°Π½Π΄Π°ΡΡΠ½ΡΡ
ΡΡ
Π΅ΠΌ ΠΏΡΠΎΠ³ΡΠ°ΠΌΠΌ, ΠΌΠΈΠ½ΠΈΠΌΠΈΠ·Π°ΡΠΈΡ ΠΊΠΎΡΠΎΡΡΡ
ΠΎΡΡΡΠ΅ΡΡΠ²ΠΈΠΌΠ° Π·Π° ΠΏΠΎΠ»ΠΈΠ½ΠΎΠΌΠΈΠ°Π»ΡΠ½ΠΎΠ΅ Π²ΡΠ΅ΠΌΡ ΠΏΡΠΈ ΠΏΠΎΠΌΠΎΡΠΈ ΡΠ°Π½Π΅Π΅ ΠΈΠ·Π²Π΅ΡΡΠ½ΡΡ
ΠΌΠ΅ΡΠΎΠ΄ΠΎΠ² ΠΌΠΈΠ½ΠΈΠΌΠΈΠ·Π°ΡΠΈΠΈ Π°Π²ΡΠΎΠΌΠ°ΡΠΎΠ²-ΠΏΡΠ΅ΠΎΠ±ΡΠ°Π·ΠΎΠ²Π°ΡΠ΅Π»Π΅ΠΉ, ΡΠ°Π±ΠΎΡΠ°ΡΡΠΈΡ
Π½Π°Π΄ ΠΏΠΎΠ»ΡΠ³ΡΡΠΏΠΏΠ°ΠΌΠΈ. Π Π·Π°ΠΊΠ»ΡΡΠ΅Π½ΠΈΠΈ ΠΏΡΠΈΠ²Π΅Π΄Π΅Π½ ΠΏΡΠΈΠΌΠ΅Ρ, ΡΠ²ΠΈΠ΄Π΅ΡΠ΅Π»ΡΡΡΠ²ΡΡΡΠΈΠΉ ΠΎ ΡΠΎΠΌ, ΡΡΠΎ Π² ΠΎΠ±ΡΠ΅ΠΌ ΡΠ»ΡΡΠ°Π΅ Π·Π°Π΄Π°ΡΠ° ΠΌΠΈΠ½ΠΈΠΌΠΈΠ·Π°ΡΠΈΠΈ Π°Π²ΡΠΎΠΌΠ°ΡΠΎΠ²- ΠΏΡΠ΅ΠΎΠ±ΡΠ°Π·ΠΎΠ²Π°ΡΠ΅Π»Π΅ΠΉ Π½Π°Π΄ ΠΏΠΎΠ»ΡΠ³ΡΡΠΏΠΏΠΎΠΉ ΠΏΠΎΠ΄ΡΡΠ°Π½ΠΎΠ²ΠΎΠΊ ΠΌΠΎΠΆΠ΅Ρ ΠΈΠΌΠ΅ΡΡ Π½Π΅ΡΠΊΠΎΠ»ΡΠΊΠΎ Π½Π΅ΠΈΠ·ΠΎΠΌΠΎΡΡΠ½ΡΡ
ΡΠ΅ΡΠ΅Π½ΠΈΠΉ.
Recommended from our members
CHREST+: A simulation of how humans learn to solve problems using diagrams.
This paper describes the underlying principles of a computer model, CHREST+, which learns to solve problems using diagrammatic representations. Although earlier work has determined that experts store domain-specific information within schemata, no substantive model has been proposed for learning such representations. We describe the different strategies used by subjects in constructing a diagrammatic representation of an electric circuit known as an AVOW diagram, and explain how these strategies fit a theory for the learnt representations. Then we describe CHREST+, an extended version of an established model of human perceptual memory. The extension enables the model to relate information learnt about circuits with that about their associated AVOW diagrams, and use this information as a schema to improve its efficiency at problem solving
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Elements of latent learning in a maze environment
A general purpose learning program is described which demonstrates a latent learning ability by operating at two separate goal pursuit levels. At one level are the constant, implicit goals associated with the system's memory management mechanisms. At the higher level are the dynamic, explicit behavioral goals which the implicit goals enable by manipulating memory representations to conform to the external surroundings. The program is shown to negotiate a simulated maze environment by the step-wise refinement of its latently learned experiences
An Abstract Machine for Unification Grammars
This work describes the design and implementation of an abstract machine,
Amalia, for the linguistic formalism ALE, which is based on typed feature
structures. This formalism is one of the most widely accepted in computational
linguistics and has been used for designing grammars in various linguistic
theories, most notably HPSG. Amalia is composed of data structures and a set of
instructions, augmented by a compiler from the grammatical formalism to the
abstract instructions, and a (portable) interpreter of the abstract
instructions. The effect of each instruction is defined using a low-level
language that can be executed on ordinary hardware.
The advantages of the abstract machine approach are twofold. From a
theoretical point of view, the abstract machine gives a well-defined
operational semantics to the grammatical formalism. This ensures that grammars
specified using our system are endowed with well defined meaning. It enables,
for example, to formally verify the correctness of a compiler for HPSG, given
an independent definition. From a practical point of view, Amalia is the first
system that employs a direct compilation scheme for unification grammars that
are based on typed feature structures. The use of amalia results in a much
improved performance over existing systems.
In order to test the machine on a realistic application, we have developed a
small-scale, HPSG-based grammar for a fragment of the Hebrew language, using
Amalia as the development platform. This is the first application of HPSG to a
Semitic language.Comment: Doctoral Thesis, 96 pages, many postscript figures, uses pstricks,
pst-node, psfig, fullname and a macros fil
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