2,088 research outputs found

    A 10-bit Charge-Redistribution ADC Consuming 1.9 μW at 1 MS/s

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    This paper presents a 10 bit successive approximation ADC in 65 nm CMOS that benefits from technology scaling. It meets extremely low power requirements by using a charge-redistribution DAC that uses step-wise charging, a dynamic two-stage comparator and a delay-line-based controller. The ADC requires no external reference current and uses only one external supply voltage of 1.0 V to 1.3 V. Its supply current is proportional to the sample rate (only dynamic power consumption). The ADC uses a chip area of approximately 115--225 μm2. At a sample rate of 1 MS/s and a supply voltage of 1.0 V, the 10 bit ADC consumes 1.9 μW and achieves an energy efficiency of 4.4 fJ/conversion-step

    Impact of PWM strategies on RMS current of the DC-link Voltage Capacitor of a dual-three phase drive

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    The major drawback of usual dual three-phase AC machines, when supplied by a Voltage Source Inverter (VSI), is the occurrence of extra harmonic currents which circulate in the stator windings causing additional losses and constraints on the power component. This paper compares dedicated Pulse Width Modulation (PWM) strategies used for controlling a dual three phase Permanent Magnet Synchronous machine supplied by a six-leg VSI. Since the application is intended for low-voltage (48V) mild-hybrid automotive traction, an additional major constraint arises: the compactness of the drive related to the size of the DC-bus capacitor. Thus, the PWM strategy must be chosen by taking into consideration its impact on both, the motor and the RMS value of DC-bus current

    Reliability analysis of single-phase photovoltaic inverters with reactive power support

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    Reactive power support is expected to be an emerging ancillary requirement for single-phase photovoltaic (PV) inverters. This work assesses related reliability issues and focuses on the second stage or inversion process in PV inverters. Three PV inverter topologies are analyzed and their reliability is determined on a component-by-component level. Limiting operating points are considered for each of these topologies. The capacitor in the dc link, the MOSFETs in the inverting bridge, and the output filter are the components affected. Studies show that varying power-factor operation with a constant real power output increases the energy storage requirement as well as the capacitance required in the dc link in order to produce the double-frequency power ripple. The overall current rating of the MOSFETs and output filter must also be sized to accommodate the current for the apparent power output. Modeling of the inverter verifies the conditions for each of the components under varying reactive power support commands. It is shown that the production of reactive power can significantly increase the capacitance requirement, but the limiting reliability issue comes from the increased output current rating of the MOSFETs

    Experimental investigation of a shielded complementary Metal-Oxide Semiconductor (MOS) structure

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    A shielded integrated complimentary MOS transistor structure is described which is used to prevent field inversion in the region not occupied by the gates and which permits the use of a thinner field oxide, reduces the chip area, and has provision for simplified multilayer connections. The structure is used in the design of a static shift register and results in a 20% reduction in area

    Circuit Structure and Control Method to Reduce Size and Harmonic Distortion of Interleaved Dual Buck Inverter

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    A new circuit structure and control method for a high power interleaved dual-buck inverter are proposed. The proposed inverter consists of six switches, four diodes and two inductors, uses a dual-buck structure to eliminate zero-cross distortion, and operates in an interleaved mode to reduce the current stress of switch. To reduce the total harmonic distortion at low output power, the inverter is controlled using discontinuous-current-mode control combined with continuous-current-mode control. The experimental inverter had a power-conversion efficiency of 98.5% at output power = 1300 W and 98.3% at output power = 2 kW, when the inverter was operated at an input voltage of 400 V-DC, output voltage of 220 V-AC/60 Hz, and switching frequency of 20 kHz. The total harmonic distortion was < 0.66%, which demonstrates that the inverter is suitable for high-power dc-ac power conversion.11Ysciescopu

    Inverter-converter automatic paralleling and protection

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    Electric control and protection circuits for parallel operation of inverter-converte

    A 300-800MHz Tunable Filter and Linearized LNA applied in a Low-Noise Harmonic-Rejection RF-Sampling Receiver

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    A multiband flexible RF-sampling receiver aimed at software-defined radio is presented. The wideband RF sampling function is enabled by a recently proposed discrete-time mixing downconverter. This work exploits a voltage-sensing LNA preceded by a tunable LC pre-filter with one external coil to demonstrate an RF-sampling receiver with low noise figure (NF) and high harmonic rejection (HR). The second-order LC filter provides voltage pre-gain and attenuates the source noise aliasing, and it also improves the HR ratio of the sampling downconverter. The LNA consists of a simple amplifier topology built from inverters and resistors to improve the third-order nonlinearity via an enhanced voltage mirror technique. The RF-sampling receiver employs 8 times oversampling covering 300 to 800 MHz in two RF sub-bands. The chip is realized in 65 nm CMOS and the measured gain across the band is between 22 and 28 dB, while achieving a NF between 0.8 to 4.3 dB. The IIP2 varies between +38 and +49 dBm and the IIP3 between -14 dBm and -9 dBm, and the third and fifth order HR ratios are more than 60 dB. The LNA and downconverter consumes 6 mW, and the clock generator takes 12 mW at 800 MHz RF.\ud \u

    Three-phase DC/AC power converter with power quality optimization

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    Introduction— The DC/AC power conversion systems currently used in multiple applications such as alternative energy sources involve power quality problems due to voltage regulations and distortions such as those caused by harmonic distortion. Objective— Develop a power converter prototype that, through a multi-objective genetic algorithm, allows optimizing the energy quality of three-phase inversion systems through the use of multilevel converters. Methodology— The prototype to be used in the power conversion is defined, the output voltage is modeled mathematically, the optimization multi-objective genetic algorithms are developed, the prototype is implemented and its operation is validated. Results— The algorithm developed and implemented in the developed prototype mitigates power quality phenomena associated with short and long duration variations such as swell, sag, undervoltage and overvoltage, avoids the presence of voltage fluctuations and presents a lower harmonic content in all 1% cases. Conclusions— The implemented prototype allows optimizing the power quality of three-phase power supply systems through the use of multilevel inverters, avoiding the presence of power quality phenomena.Introducción— Los sistemas de conversión DC/AC utilizados actualmente en múltiples aplicaciones como las fuentes alternativas de energía involucra problemas de la calidad de la energía debido regulaciones de tensión y deformaciones como las causadas por la distorsión armónica. Objetivo— Desarrollar un prototipo que a través de un algoritmo genético multiobjetivo permita optimizar la calidad de la energía de los sistemas de inversión trifásicos a través del uso de convertidores multinivel. Metodología— Se define el prototipo a utilizar en la conversión de potencia, se modela matemáticamente la tensión de salida, se desarrollan los algoritmos genéticos multiobjetivo de optimización, se implementa el prototipo y se valida su funcionamiento. Resultados— El algoritmo desarrollado e implementado en el prototipo desarrollado mitiga los fenómenos de calidad de la energía asociados a las variaciones de corta y larga duración como swell, sag, undervoltaje y overvoltaje, evita la presencia de fluctuaciones de tensión y presenta un contenido armónico menor en todos los casos del 1% Conclusiones— El prototipo implementado optimizar la calidad de la energía de los sistemas trifásicos de suministro de energía a través del uso de un inversor multinivel, evitando la presencia de fenómenos de calidad de la energía.&nbsp
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