Fast LTL Satisfiability Checking by SAT Solvers

Satisfiability checking for Linear Temporal Logic (LTL) is a fundamental step in checking for possible errors in LTL assertions. Extant LTL satisfiability checkers use a variety of different search procedures. With the sole exception of LTL satisfiability checking based on bounded model checking, which does not provide a complete decision procedure, LTL satisfiability checkers have not taken advantage of the remarkable progress over the past 20 years in Boolean satisfiability solving. In this paper, we propose a new LTL satisfiability-checking framework that is accelerated using a Boolean SAT solver. Our approach is based on the variant of the \emph{obligation-set method}, which we proposed in earlier work. We describe here heuristics that allow the use of a Boolean SAT solver to analyze the obligations for a given LTL formula. The experimental evaluation indicates that the new approach provides a a significant performance advantage

Model Checker Execution Reports

Software model checking constitutes an undecidable problem and, as such, even an ideal tool will in some cases fail to give a conclusive answer. In practice, software model checkers fail often and usually do not provide any information on what was effectively checked. The purpose of this work is to provide a conceptual framing to extend software model checkers in a way that allows users to access information about incomplete checks. We characterize the information that model checkers themselves can provide, in terms of analyzed traces, i.e. sequences of statements, and safe cones, and present the notion of execution reports, which we also formalize. We instantiate these concepts for a family of techniques based on Abstract Reachability Trees and implement the approach using the software model checker CPAchecker. We evaluate our approach empirically and provide examples to illustrate the execution reports produced and the information that can be extracted

An overview of existing modeling tools making use of model checking in the analysis of biochemical networks

Model checking is a well-established technique for automaticallyverifying complex systems. Recently, model checkers have appearedin computer tools for the analysis of biochemical (and generegulatory) networks. We survey several such tools to assess thepotential of model checking in computational biology. Next, our overviewfocuses on direct applications of existing model checkers, as well ason algorithms for biochemical network analysis influenced by modelchecking, such as those using binary decision diagrams or Booleansatisfiability solvers. We conclude with advantages and drawbacks ofmodel checking for the analysis of biochemical networks

Scaling Bounded Model Checking By Transforming Programs With Arrays

Bounded Model Checking is one the most successful techniques for finding bugs in program. However, model checkers are resource hungry and are often unable to verify programs with loops iterating over large arrays.We present a transformation that enables bounded model checkers to verify a certain class of array properties. Our technique transforms an array-manipulating (ANSI-C) program to an array-free and loop-free (ANSI-C) program thereby reducing the resource requirements of a model checker significantly. Model checking of the transformed program using an off-the-shelf bounded model checker simulates the loop iterations efficiently. Thus, our transformed program is a sound abstraction of the original program and is also precise in a large number of cases - we formally characterize the class of programs for which it is guaranteed to be precise. We demonstrate the applicability and usefulness of our technique on both industry code as well as academic benchmarks

Common modeling language for model checkers

Problem statement: There are many different model checkers that have been developed. Each of the model checkers is based on different input languages and they are suitable for model checking different types of systems. Thus it is important for us to choose the right model checker or modeling and verifying a given system. However, moving from one model checker to another is not an easy task since we have to deal with different input languages. Approach: In order to solve the problem we propose a common modeling language that is based on UML state chart. Some translation rules for translating the model described in the common modeling language into the input languages of model checkers are also presented. Results: The result of the case study shows that our approach has been successfully applied in modeling the control system through the process of transformation and translation. Conclusion: Common modeling language can be used as a front end to help users to properly model a system before it is translated into input language of model checkers