bBlocks : a flexible object oriented microarchitecture simulation framework

Graduation date: 2001This research develops an object-oriented approach of modeling\ud microprocessor architecture. A generic modeling library, bBlocks, is proposed as a\ud framework for constructing microprocessor simulation. bBlocks is a collection of\ud predefined abstract components (blocks) implemented in Java, the object-oriented\ud programming language.\ud Blocks are defined and used as the basic components in a variety of\ud microprocessor operation modeling, simulations, and optimizations in bBlocks. The\ud basic activities of a microprocessor are encapsulated into blocks. By using standard\ud interfaces, blocks are integrated into the proposed modeling framework. Unlike\ud traditional software simulators, this framework is cycle based, concurrent capable\ud simulation, which may take advantage of multi-threading or parallel computation\ud techniques.\ud Using an object-oriented approach, bBlocks adapts an open system policy,\ud which gives end users the flexibility of incorporating user-defined components into\ud end models and integrating the user-preferred architecture. Another purpose of this\ud research is to provide a mechanism to model and study future microprocessors.\ud bBlocks is implemented in Java, a truly cross-platfonn object-oriented language. It\ud is conceivable that bBlocks could eventually run on any machine, regardless of the\ud architecture or operating system as long as it is running the Java Virtual Machine.\ud In addition to this, with Java GUI tools, bBlocks provides probes to investigate the\ud activities inside the blocks.\ud To illustrate the effectiveness of bBlocks, two architectures, SuperScalar\ud and CDF, have been implemented

bBlocks : a flexible object oriented microarchitecture simulation framework

This research develops an object-oriented approach of modeling microprocessor architecture. A generic modeling library, bBlocks, is proposed as a framework for constructing microprocessor simulation. bBlocks is a collection of predefined abstract components (blocks) implemented in Java, the object-oriented programming language. Blocks are defined and used as the basic components in a variety of microprocessor operation modeling, simulations, and optimizations in bBlocks. The basic activities of a microprocessor are encapsulated into blocks. By using standard interfaces, blocks are integrated into the proposed modeling framework. Unlike traditional software simulators, this framework is cycle based, concurrent capable simulation, which may take advantage of multi-threading or parallel computation techniques. Using an object-oriented approach, bBlocks adapts an open system policy, which gives end users the flexibility of incorporating user-defined components into end models and integrating the user-preferred architecture. Another purpose of this research is to provide a mechanism to model and study future microprocessors. bBlocks is implemented in Java, a truly cross-platfonn object-oriented language. It is conceivable that bBlocks could eventually run on any machine, regardless of the architecture or operating system as long as it is running the Java Virtual Machine. In addition to this, with Java GUI tools, bBlocks provides probes to investigate the activities inside the blocks. To illustrate the effectiveness of bBlocks, two architectures, SuperScalar and CDF, have been implemented

Service-oriented high level architecture

Service-oriented High Level Architecture (SOHLA) refers to the high level architecture (HLA) enabled by Service-Oriented Architecture (SOA) and Web Services etc. techniques which supports distributed interoperating services. The detailed comparisons between HLA and SOA are made to illustrate the importance of their combination. Then several key enhancements and changes of HLA Evolved Web Service API are introduced in comparison with native APIs, such as Federation Development and Execution Process, communication mechanisms, data encoding, session handling, testing environment and performance analysis. Some approaches are summarized including Web-Enabling HLA at the communication layer, HLA interface specification layer, federate interface layer and application layer. Finally the problems of current research are discussed, and the future directions are pointed out.Comment: 12 pages, 3 figures, 2 tables, Proceedings of 2008 European Simulation Interoperability Workshop, 08E-SIW-02

Julia Programming Language Benchmark Using a Flight Simulation

Julias goal to provide scripting language ease-of-coding with compiled language speed is explored. The runtime speed of the relatively new Julia programming language is assessed against other commonly used languages including Python, Java, and C++. An industry-standard missile and rocket simulation, coded in multiple languages, was used as a test bench for runtime speed. All language versions of the simulation, including Julia, were coded to a highly-developed object-oriented simulation architecture tailored specifically for time-domain flight simulation. A speed-of-coding second-dimension is plotted against runtime for each language to portray a space that characterizes Julias scripting language efficiencies in the context of the other languages. With caveats, Julia runtime speed was found to be in the class of compiled or semi-compiled languages. However, some factors that affect runtime speed at the cost of ease-of-coding are shown. Julias built-in functionality for multi-core processing is briefly examined as a means for obtaining even faster runtime speed. The major contribution of this research to the extensive language benchmarking body-of-work is comparing Julia to other mainstream languages using a complex flight simulation as opposed to benchmarking with single algorithms

Comparative Study of APIs and Frameworks for Haptic Application Development

The simulation of tactile sensation using haptic devices is increasingly investigated in conjunction with simulation and training. In this paper we explore the most popular haptic frameworks and APIs. We provide a comprehensive review and comparison of their features and capabilities, from the perspective of the need to develop a haptic simulator for medical training purposes. In order to compare the studied frameworks and APIs, we identified and applied a set of 11 criteria and we obtained a classification of platforms, from the perspective of our project. According to this classification, we used the best platform to develop a visual-haptic prototype for liver diagnostics

Towards a More Complete Object-Orientation in Design Grammars

The ongoing digital transformation in industry applies to all product life cycle's stages. The design decisions and dimensioning carried out in the early conceptual design stages determine a huge part of the product's life cycle costs (LCC). The automation of the conceptual design phase promises therefore huge gains in terms of LCC. Design grammars encode design processes in production systems made up of rule sequences which automatically create an abstract central product model (central data model) from given requirements. Graph-based design languages use the Unified-Modeling-Language (UML) to define the product entities (classes) supporting object-oriented inheritance. Graphical rules instantiate the classes and iteratively assemble the central model. This paper proposes to extend the design languages by introducing methods (operations). This allows the use of object-oriented design patterns and interface mechanisms as object-oriented principles are then fully implemented. A graphical mechanism to model the method calls is presented which integrates seamlessly into the graph-based design language's graphical rule specification. The object oriented design grammar enables modularization and reusability of engineering knowledge. The integration of engineering domains is enhanced and multistakeholder collaboration with access control (information security) becomes feasible.Comment: Submission Version, Submitted to SN Applied Sciences (SNAS), Applied Sciences, 16 pages, 14 figure

Emulating Hybrid Memory on NUMA Hardware

Non-volatile memory (NVM) has the potential to disrupt the boundary between memory and storage, including the abstractions that manage this boundary. Researchers comparing the speed, durability, and abstractions of hybrid systems with DRAM, NVM, and disk to traditional systems typically use simulation, which makes it easy to evaluate different hardware technologies and parameters. Unfortunately, simulation is extremely slow, limiting the number of applications and dataset sizes in the evaluation. Simulation typically precludes realistic multiprogram workloads and considering runtime and operating system design alternatives. Good methodology embraces a variety of techniques for validation, expanding the experimental scope, and uncovering new insights. This paper introduces an emulation platform for hybrid memory that uses commodity NUMA servers. Emulation complements simulation well, offering speed and accuracy for realistic workloads, and richer software experimentation. We use a thread-local socket to emulate DRAM and the remote socket to emulate NVM. We use standard C library routines to allocate heap memory in the DRAM or NVM socket for use with explicit memory management or garbage collection. We evaluate the emulator using various configurations of write-rationing garbage collectors that improve NVM lifetimes by limiting writes to NVM, and use 15 applications from three benchmark suites with various datasets and workload configurations. We show emulation enhances simulation results. The two systems confirm most trends, such as NVM write and read rates of different software configurations, increasing our confidence for predicting future system effects. Emulation adds novel insights, such as the non-linear effects of multi-program workloads on write rates

Methodology for object-oriented real-time systems analysis and design: Software engineering

Successful application of software engineering methodologies requires an integrated analysis and design life-cycle in which the various phases flow smoothly 'seamlessly' from analysis through design to implementation. Furthermore, different analysis methodologies often lead to different structuring of the system so that the transition from analysis to design may be awkward depending on the design methodology to be used. This is especially important when object-oriented programming is to be used for implementation when the original specification and perhaps high-level design is non-object oriented. Two approaches to real-time systems analysis which can lead to an object-oriented design are contrasted: (1) modeling the system using structured analysis with real-time extensions which emphasizes data and control flows followed by the abstraction of objects where the operations or methods of the objects correspond to processes in the data flow diagrams and then design in terms of these objects; and (2) modeling the system from the beginning as a set of naturally occurring concurrent entities (objects) each having its own time-behavior defined by a set of states and state-transition rules and seamlessly transforming the analysis models into high-level design models. A new concept of a 'real-time systems-analysis object' is introduced and becomes the basic building block of a series of seamlessly-connected models which progress from the object-oriented real-time systems analysis and design system analysis logical models through the physical architectural models and the high-level design stages. The methodology is appropriate to the overall specification including hardware and software modules. In software modules, the systems analysis objects are transformed into software objects

Developing a service-oriented component framework for a landscape modeling language

With modeling and simulation, it is possible to study how a system works before trying to predict how it would behave in a variety of situations. However, when modeling landscape processes, issues related to space, time and multiple scales need to be addressed. In order to investigate these issues, a modeling platform based on a Domain Specific Language (DSL) has been developed. One of the main technical challenges of this platform is the ability to build applications with the capacity to themselves dynamically adapt to their environment. In this paper, we present the arguments and motivations behind the choice of the Service- Oriented Computing (SOC) approach when implementing the execution framework of the DSL. The modeling platform is composed of a development environment based on Eclipse IDE, a code generator, and an execution framework. The execution framework, which is the focus of this paper, must meet the constraints set by dynamic landscapes modeling, while capitalizing on the possibilities offered by the SOC approach. (Résumé d'auteur

Integrated Design Tools for Embedded Control Systems

Currently, computer-based control systems are still being implemented using the same techniques as 10 years ago. The purpose of this project is the development of a design framework, consisting of tools and libraries, which allows the designer to build high reliable heterogeneous real-time embedded systems in a very short time at a fraction of the present day costs. The ultimate focus of current research is on transformation control laws to efficient concurrent algorithms, with concerns about important non-functional real-time control systems demands, such as fault-tolerance, safety,\ud reliability, etc.\ud The approach is based on software implementation of CSP process algebra, in a modern way (pure objectoriented design in Java). Furthermore, it is intended that the tool will support the desirable system-engineering stepwise refinement design approach, relying on past research achievements ¿ the mechatronics design trajectory based on the building-blocks approach, covering all complex (mechatronics) engineering phases: physical system modeling, control law design, embedded control system implementation and real-life realization. Therefore, we expect that this project will result in an\ud adequate tool, with results applicable in a wide range of target hardware platforms, based on common (off-theshelf) distributed heterogeneous (cheap) processing units