Error Floors of LDPC Coded BICM

In recent years performance prediction for communication systems utilizing iteratively decodable codes has been of considerable interest. There have been significant breakthroughs as far as the analysis of LDPC code ensembles is concerned but the more practical problem of predicting the FER/BER of a particular code has proved to be much more difficult. In this work we present a technique (based on the work of Richardson \u2703) for finding lower and upper bounds on the performance of LDPC coded BICM systems for a given code. The insight gained from the prediction technique is used to design interleavers that improve the error floors of these systems

Polar Coding Schemes for Cooperative Transmission Systems

: In this thesis, a serially-concatenated coding scheme with a polar code as the outer code and a low density generator matrix (LDGM) code as the inner code is firstly proposed. It is shown that that the proposed scheme provides a method to improve significantly the low convergence of polar codes and the high error floor of LDGM codes while keeping the advantages of both such as the low encoding and decoding complexity. The bit error rate results show that the proposed scheme by reasonable design have the potential to approach a performance close to the capacity limit and avoid error floor effectively. Secondly, a novel transmission protocol based on polar coding is proposed for the degraded half-duplex relay channel. In the proposed protocol, the relay only needs to forward a part of the decoded source message that the destination needs according to the exquisite nested structure of polar codes. It is proved that the scheme can achieve the capacity of the half-duplex relay channel while enjoying low encoding/decoding complexity. By modeling the practical system, we verify that the proposed scheme outperforms the conventional scheme designed by low-density parity-check codes by simulations. Finally, a generalized partial information relaying protocol is proposed for degraded multiple-relay networks with orthogonal receiver components (MRN-ORCs). In such a protocol, each relay node decodes the received source message with the help of partial information from previous nodes and re-encodes part of the decoded message for transmission to satisfy the decoding requirements for the following relay node or the destination node. For the design of polar codes, the nested structures are constructed based on this protocol and the information sets corresponding to the partial messages forwarded are also calculated. It is proved that the proposed scheme achieves the theoretical capacity of the degraded MRN-ORCs while still retains the low-complexity feature of polar codes

Capacity-Achieving Ensembles of Accumulate-Repeat-Accumulate Codes for the Erasure Channel with Bounded Complexity

The paper introduces ensembles of accumulate-repeat-accumulate (ARA) codes which asymptotically achieve capacity on the binary erasure channel (BEC) with {\em bounded complexity}, per information bit, of encoding and decoding. It also introduces symmetry properties which play a central role in the construction of capacity-achieving ensembles for the BEC with bounded complexity. The results here improve on the tradeoff between performance and complexity provided by previous constructions of capacity-achieving ensembles of codes defined on graphs. The superiority of ARA codes with moderate to large block length is exemplified by computer simulations which compare their performance with those of previously reported capacity-achieving ensembles of LDPC and IRA codes. The ARA codes also have the advantage of being systematic.Comment: Submitted to IEEE Trans. on Information Theory, December 1st, 2005. Includes 50 pages and 13 figure

Iterative Demodulation and Decoding for LDPC Coded Generalized Frequency Division Multiplexing

Currently, there is a standardization process underway to design the fifth generation of wireless systems or 5G wireless systems. The ambitious targets set forth for 5G wireless systems call for novel approaches in all layers of the network. At the physical layer (PHY), Orthogonal Frequency Division Multiplexing (OFDM) has become a de facto standard for wireless systems such as 4G cellular and IEEE 802.11 (Wi-Fi) systems. However, the large peak to average power ratio of OFDM signals makes OFDM an unattractive candidate for some services envisioned in 5G systems, particularly in the uplink. Recently, Generalized Frequency Division Multiplexing (GFDM), which is a member of the non-orthogonal multiple access technologies has been proposed as the modulation scheme for 5G wireless systems. GFDM has some advantages over OFDM, such as looser requirements on synchronization, a lower PAPR requirement,as well as a lower out-of-band spectral leakage. However, in GFDM the sub-channels are not orthogonal which results in inter-carrier interference and, hence, an increased uncoded bit error rate. While iterative receivers have been proposed for improving the bit error rate performance of uncoded GFDM, there are very few works that have studied the performance of coded GFDM systems. In this thesis, we investigate the performance of coded systems with GFDM. Using earlier results on soft interference cancellation based turbo equalization and turbo multi-user detection, we design an iterative receiver for GFDM with low density parity check codes. We show that the receiver is able to successfully combat the non-orthogonality of sub-channels in GFDM and provide performance similar to that of coded OFDM systems at an increased receiver complexity

Applied Advanced Error Control Coding for General Purpose Representation and Association Machine Systems

General-Purpose Representation and Association Machine (GPRAM) is proposed to be focusing on computations in terms of variation and flexibility, rather than precision and speed. GPRAM system has a vague representation and has no predefined tasks. With several important lessons learned from error control coding, neuroscience and human visual system, we investigate several types of error control codes, including Hamming code and Low-Density Parity Check (LDPC) codes, and extend them to different directions. While in error control codes, solely XOR logic gate is used to connect different nodes. Inspired by bio-systems and Turbo codes, we suggest and study non-linear codes with expanded operations, such as codes including AND and OR gates which raises the problem of prior-probabilities mismatching. Prior discussions about critical challenges in designing codes and iterative decoding for non-equiprobable symbols may pave the way for a more comprehensive understanding of bio-signal processing. The limitation of XOR operation in iterative decoding with non-equiprobable symbols is described and can be potentially resolved by applying quasi-XOR operation and intermediate transformation layer. Constructing codes for non-equiprobable symbols with the former approach cannot satisfyingly perform with regarding to error correction capability. Probabilistic messages for sum-product algorithm using XOR, AND, and OR operations with non-equiprobable symbols are further computed. The primary motivation for the constructing codes is to establish the GPRAM system rather than to conduct error control coding per se. The GPRAM system is fundamentally developed by applying various operations with substantial over-complete basis. This system is capable of continuously achieving better and simpler approximations for complex tasks. The approaches of decoding LDPC codes with non-equiprobable binary symbols are discussed due to the aforementioned prior-probabilities mismatching problem. The traditional Tanner graph should be modified because of the distinction of message passing to information bits and to parity check bits from check nodes. In other words, the message passing along two directions are identical in conventional Tanner graph, while the message along the forward direction and backward direction are different in our case. A method of optimizing signal constellation is described, which is able to maximize the channel mutual information. A simple Image Processing Unit (IPU) structure is proposed for GPRAM system, to which images are inputted. The IPU consists of a randomly constructed LDPC code, an iterative decoder, a switch, and scaling and decision device. The quality of input images has been severely deteriorated for the purpose of mimicking visual information variability (VIV) experienced in human visual systems. The IPU is capable of (a) reliably recognizing digits from images of which quality is extremely inadequate; (b) achieving similar hyper-acuity performance comparing to human visual system; and (c) significantly improving the recognition rate with applying randomly constructed LDPC code, which is not specifically optimized for the tasks

The Logic of Random Pulses: Stochastic Computing.

Recent developments in the field of electronics have produced nano-scale devices whose operation can only be described in probabilistic terms. In contrast with the conventional deterministic computing that has dominated the digital world for decades, we investigate a fundamentally different technique that is probabilistic by nature, namely, stochastic computing (SC). In SC, numbers are represented by bit-streams of 0's and 1's, in which the probability of seeing a 1 denotes the value of the number. The main benefit of SC is that complicated arithmetic computation can be performed by simple logic circuits. For example, a single (logic) AND gate performs multiplication. The dissertation begins with a comprehensive survey of SC and its applications. We highlight its main challenges, which include long computation time and low accuracy, as well as the lack of general design methods. We then address some of the more important challenges. We introduce a new SC design method, called STRAUSS, that generates efficient SC circuits for arbitrary target functions. We then address the problems arising from correlation among stochastic numbers (SNs). In particular, we show that, contrary to general belief, correlation can sometimes serve as a resource in SC design. We also show that unlike conventional circuits, SC circuits can tolerate high error rates and are hence useful in some new applications that involve nondeterministic behavior in the underlying circuitry. Finally, we show how SC's properties can be exploited in the design of an efficient vision chip that is suitable for retinal implants. In particular, we show that SC circuits can directly operate on signals with neural encoding, which eliminates the need for data conversion.PhDComputer Science and EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/113561/1/alaghi_1.pd

Doctor of Philosophy

dissertationThe continuous growth of wireless communication use has largely exhausted the limited spectrum available. Methods to improve spectral efficiency are in high demand and will continue to be for the foreseeable future. Several technologies have the potential to make large improvements to spectral efficiency and the total capacity of networks including massive multiple-input multiple-output (MIMO), cognitive radio, and spatial-multiplexing MIMO. Of these, spatial-multiplexing MIMO has the largest near-term potential as it has already been adopted in the WiFi, WiMAX, and LTE standards. Although transmitting independent MIMO streams is cheap and easy, with a mere linear increase in cost with streams, receiving MIMO is difficult since the optimal methods have exponentially increasing cost and power consumption. Suboptimal MIMO detectors such as K-Best have a drastically reduced complexity compared to optimal methods but still have an undesirable exponentially increasing cost with data-rate. The Markov Chain Monte Carlo (MCMC) detector has been proposed as a near-optimal method with polynomial cost, but it has a history of unusual performance issues which have hindered its adoption. In this dissertation, we introduce a revised derivation of the bitwise MCMC MIMO detector. The new approach resolves the previously reported high SNR stalling problem of MCMC without the need for hybridization with another detector method or adding heuristic temperature scaling terms. Another common problem with MCMC algorithms is an unknown convergence time making predictable fixed-length implementations problematic. When an insufficient number of iterations is used on a slowly converging example, the output LLRs can be unstable and overconfident, therefore, we develop a method to identify rare, slowly converging runs and mitigate their degrading effects on the soft-output information. This improves forward-error-correcting code performance and removes a symptomatic error floor in bit-error-rates. Next, pseudo-convergence is identified with a novel way to visualize the internal behavior of the Gibbs sampler. An effective and efficient pseudo-convergence detection and escape strategy is suggested. Finally, the new excited MCMC (X-MCMC) detector is shown to have near maximum-a-posteriori (MAP) performance even with challenging, realistic, highly-correlated channels at the maximum MIMO sizes and modulation rates supported by the 802.11ac WiFi specification, 8x8 256 QAM. Further, the new excited MCMC (X-MCMC) detector is demonstrated on an 8-antenna MIMO testbed with the 802.11ac WiFi protocol, confirming its high performance. Finally, a VLSI implementation of the X-MCMC detector is presented which retains the near-optimal performance of the floating-point algorithm while having one of the lowest complexities found in the near-optimal MIMO detector literature