4,944 research outputs found
Photo-FETs: phototransistors enabled by 2D and 0D nanomaterials
The large diversity of applications in our daily lives that rely on photodetection technology requires photodetectors with distinct properties. The choice of an adequate photodetecting system depends on its application, where aspects such as spectral selectivity, speed, and sensitivity play a critical role. High-sensitivity photodetection covering a large spectral range from the UV to IR is dominated by photodiodes. To overcome existing limitations in sensitivity and cost of state-of-the-art systems, new device architectures and material systems are needed with low-cost fabrication and high performance. Low-dimensional nanomaterials (0D, 1D, 2D) are promising candidates with many unique electrical and optical properties and additional functionalities such as flexibility and transparency. In this Perspective, the physical mechanism of photo-FETs (field-effect transistors) is described and recent advances in the field of low-dimensional photo-FETs and hybrids thereof are discussed. Several requirements for the channel material are addressed in view of the photon absorption and carrier transport process, and a fundamental trade-off between them is pointed out for single-material-based devices. We further clarify how hybrid devices, consisting of an ultrathin channel sensitized with strongly absorbing semiconductors, can circumvent these limitations and lead to a new generation of highly sensitive photodetectors. Recent advances in the development of sensitized low-dimensional photo-FETs are discussed, and several promising future directions for their application in high-sensitivity photodetection are proposed.Peer ReviewedPostprint (author's final draft
Controlling phonons and photons at the wavelength-scale: silicon photonics meets silicon phononics
Radio-frequency communication systems have long used bulk- and
surface-acoustic-wave devices supporting ultrasonic mechanical waves to
manipulate and sense signals. These devices have greatly improved our ability
to process microwaves by interfacing them to orders-of-magnitude slower and
lower loss mechanical fields. In parallel, long-distance communications have
been dominated by low-loss infrared optical photons. As electrical signal
processing and transmission approaches physical limits imposed by energy
dissipation, optical links are now being actively considered for mobile and
cloud technologies. Thus there is a strong driver for wavelength-scale
mechanical wave or "phononic" circuitry fabricated by scalable semiconductor
processes. With the advent of these circuits, new micro- and nanostructures
that combine electrical, optical and mechanical elements have emerged. In these
devices, such as optomechanical waveguides and resonators, optical photons and
gigahertz phonons are ideally matched to one another as both have wavelengths
on the order of micrometers. The development of phononic circuits has thus
emerged as a vibrant field of research pursued for optical signal processing
and sensing applications as well as emerging quantum technologies. In this
review, we discuss the key physics and figures of merit underpinning this
field. We also summarize the state of the art in nanoscale electro- and
optomechanical systems with a focus on scalable platforms such as silicon.
Finally, we give perspectives on what these new systems may bring and what
challenges they face in the coming years. In particular, we believe hybrid
electro- and optomechanical devices incorporating highly coherent and compact
mechanical elements on a chip have significant untapped potential for
electro-optic modulation, quantum microwave-to-optical photon conversion,
sensing and microwave signal processing.Comment: 26 pages, 5 figure
Nanostructured Device Designs for Enhanced Performance in CdS/Cu\u3csub\u3e2\u3c/sub\u3eS Heterojunction Solar Cells
Nanostructured CdS/Cu2S devices have been simulated using SCAPS-1D to demonstrate enhanced performance over traditional planar device structures. Two designs were examined: a nanowire CdS/planar Cu2S device and a nanowire CdS/nanowire Cu2S device. The addition of nanowires to a device had been previously demonstrated to improve device performance in a nanowire CdS/planar CdTe device by decreasing the amount of light absorbed by the CdS window layer, thus allowing more light to reach the absorber layer. Additionally, the total number of interface states can be greatly reduced due to the decreased total surface area between the window and absorber layers. The nanowire CdS/planar Cu2S device showed an increase in efficiency of 0.88% over an optimized planar device. The nanowire CdS/nanowire Cu2S device showed an increase in efficiency of 1.16% over the optimized planar device. This shows that there is a significant benefit to the addition of nanostructures to CdS/Cu2S solar cell devices
An accurate, trimless, high PSRR, low-voltage, CMOS bandgap reference IC
Bandgap reference circuits are used in a host of analog, digital, and mixed-signal systems to establish an accurate voltage standard for the entire IC. The accuracy of the bandgap reference voltage under steady-state (dc) and transient (ac) conditions is critical to obtain high system performance. In this work, the impact of process, power-supply, load, and temperature variations and package stresses on the dc and ac accuracy of bandgap reference circuits has been analyzed. Based on this analysis, the a bandgap reference that
1. has high dc accuracy despite process and temperature variations and package stresses, without resorting to expensive trimming or noisy switching schemes,
2. has high dc and ac accuracy despite power-supply variations, without using large off-chip capacitors that increase bill-of-material costs,
3. has high dc and ac accuracy despite load variations, without resorting to error-inducing buffers,
4. is capable of producing a sub-bandgap reference voltage with a low power-supply, to enable it to operate in modern, battery-operated portable applications,
5. utilizes a standard CMOS process, to lower manufacturing costs, and
6. is integrated, to consume less board space
has been proposed.
The functionality of critical components of the system has been verified through prototypes after which the performance of the complete system has been evaluated by integrating all the individual components on an IC.
The proposed CMOS bandgap reference can withstand 5mA of load variations while generating a reference voltage of 890mV that is accurate with respect to temperature to the first order. It exhibits a trimless, dc 3-sigma accuracy performance of 0.84% over a temperature range of -40°C to 125°C and has a worst case ac power-supply ripple rejection (PSRR) performance of 30dB up to 50MHz using 60pF of on-chip capacitance. All the proposed techniques lead to the development of a CMOS bandgap reference that meets the low-cost, high-accuracy demands of state-of-the-art System-on-Chip environments.Ph.D.Committee Chair: Rincon-Mora, Gabriel; Committee Member: Ayazi, Farrokh; Committee Member: Bhatti, Pamela; Committee Member: Leach, W. Marshall; Committee Member: Morley, Thoma
Silicon carbide technology for extreme environments
PhD ThesisWith mankind’s ever increasing curiosity to explore the unknown, including a variety of
hostile environments where we cannot tread, there exists a need for machines to do
work on our behalf. For applications in the most extreme environments and applications
silicon based electronics cannot function, and there is a requirement for circuits and
sensors to be built from wide band gap materials capable of operation in these domains.
This work addresses the initial development of silicon carbide circuits to monitor
conditions and transmit information from such hostile environments. The
characterisation, simulation and implementation of silicon carbide based circuits
utilising proprietary high temperature passives is explored.
Silicon carbide is a wide band gap semiconductor material with highly suitable
properties for high-power, high frequency and high temperature applications. The
bandgap varies depending on polytype, but the most commonly used polytype 4H, has a
value of 3.265 eV at room temperature, which reduces as the thermal ionization of
electrons from the valence band to the conduction band increases, allowing operation in
ambient up to 600°C.
Whilst silicon carbide allows for the growth of a native oxide, the quality has limitations
and therefore junction field effect transistors (JFETs) have been utilised as the switch in
this work. The characteristics of JFET devices are similar to those of early thermionic
valve technology and their use in circuits is well known. In conjunction with JFETs,
Schottky barrier diodes (SBDs) have been used as both varactors and rectifiers.
Simulation models for high temperature components have been created through their
characterisation of their electrical parameters at elevated temperatures.
The JFETs were characterised at temperatures up to 573K, and values for TO V , β , λ ,
IS , RS and junction capacitances were extracted and then used to mathematically
describe the operation of circuits using SPICE. The transconductance of SiC JFETs at
high temperatures has been shown to decrease quadratically indicating a strong
dependence upon carrier mobility in the channel. The channel resistance also decreased
quadratically as a direct result of both electric field and temperature enhanced trap
emission. The JFETs were tested to be operational up to 775K, where they failed due to
delamination of an external passivation layer.
ii
Schottky diodes were characterised up to 573K, across the temperature range and values
for ideality factor, capacitance, series resistance and forward voltage drop were
extracted to mathematically model the devices. The series resistance of a SiC SBD
exhibited a quadratic relationship with temperature indicating that it is dominated by
optical phonon scattering of charge carriers. The observed deviation from a temperature
independent ideality factor is due to the recombination of carriers in the depletion
region affected by both traps and the formation of an interfacial layer at the SiC/metal
interface.
To compliment the silicon carbide active devices utilised in this work, high temperature
passive devices and packaging/circuit boards were developed. Both HfO2 and AlN
materials were investigated for use as potential high temperature capacitor dielectrics in
metal-insulator-metal (MIM) capacitor structures. The different thicknesses of HfO2
(60nm and 90nm) and 300nm for AlN and the relevance to fabrication techniques are
examined and their effective capacitor behaviour at high temperature explored. The
HfO2 based capacitor structures exhibited high levels of leakage current at temperatures
above 100°C. Along with elevated leakage when subjected to higher electric fields. This
current leakage is due to the thin dielectric and high defect density and essentially turns
the capacitors into high value resistors in the order of MΩ. This renders the devices
unsuitable as capacitors in hostile environments at the scales tested. To address this
issue AlN capacitors with a greater dielectric film thickness were fabricated with
reduced leakage currents in comparison even at an electric field of 50MV/cm at 600K.
The work demonstrated the world’s first high temperature wireless sensor node powered
using energy harvesting technology, capable of operation at 573K. The module
demonstrated the world’s first amplitude modulation (AM) and frequency modulation
(FM) communication techniques at high temperature. It also demonstrated a novel high
temperature self oscillating boost converter cable of boosting voltages from a
thermoelectric generator also operating at this temperature.
The AM oscillator operated at a maximum temperature of 553K and at a frequency of
19.4MHz with a signal amplitude 65dB above background noise. Realised from JFETs
and HfO2 capacitors, modulation of the output signal was achieved by varying the load
resistance by use of a second SiC JFET. By applying a negative signal voltage of
between -2.5 and -3V, a 50% reduction in the signal amplitude and therefore Amplitude
Modulation was achieved by modulating the power within the oscillator through the use
of this secondary JFET. Temperature drift in the characteristics were also observed,
iii
with a decrease in oscillation frequency of almost 200 kHz when the temperature
changed from 300K to 573K. This decrease is due to the increase in capacitance density
of the HfO2 MIM capacitors and increasing junction capacitances of the JFET used as
the amplifier within the oscillator circuit.
Direct frequency modulation of a SiC Voltage Controlled Oscillator was demonstrated
at a temperature of 573K with a oscillation frequency of 17MHz. Realised from an SiC
JFET, AlN capacitors and a SiC SBD used as a varactor. It was possible to vary the
frequency of oscillations by 100 kHz with an input signal no greater than 1.5V being
applied to the SiC SBD. The effects of temperature drift were more dramatic in
comparison to the AM circuit at 400 kHz over the entire temperature range, a result of
the properties of the AlN film which causes the capacitors to increase in capacitance
density by 10%.
A novel self oscillating boost converter was commissioned using a counter wound
transformer on high temperature ferrite, a SiC JFET and a SiC SBD. Based upon the
operation of a free running blocking oscillator, oscillatory behaviour is a result of the
electric and magnetic variations in the winding of the transformer and the amplification
characteristics of a JFET. It demonstrated the ability to boost an input voltage of 1.3
volts to 3.9 volts at 573K and exhibited an efficiency of 30% at room temperature. The
frequency of operation was highly dependent upon the input voltage due to the
increased current flow through the primary coil portion of the transformer and the
ambient temperature causing an increase in permeability of the ferrite, thus altering the
inductance of both primary and secondary windings. However due its simplicity and its
ability to boost the input voltage by 250% meant it was capable of powering the
transmitters and in conjunction with a Themoelectric Generator so formed the basis for
a self powered high temperature silicon carbide sensor node.
The demonstration of these high temperature circuits provide the initial stages of being
able to produce a high temperature wireless sensor node capable of operation in hostile
environments. Utilising the self oscillating boost converter and a high temperature
Thermoelectric Generator these prototype circuits were showed the ability to harvest
energy from the high temperature ambient and power the silicon carbide circuitry.
Along with appropriate sensor technology it demonstrated the feasibility of being able
to monitor and transmit information from hazardous locations which is currently
unachievable
Semitransparent perovskite solar cells for perovskite-based tandem photovoltaics
Erneuerbare Energietechnologien auf der Grundlage der Photovoltaik werden in Zukunft eine bedeutende Rolle bei der Deckung des weltweiten Energiebedarfs spielen. Dazu muss der Wirkungsgrad der etablierten und marktbeherrschenden Photovoltaik-Technologie - kristallinem Silizium (c-Si) - erhöht werden. Der Wirkungsgrad von c-Si-Solarzellen ist jedoch bereits nahe an seiner fundamentalen Grenze von ≈29%, und daher stellen weitere Verbesserungen aus wissenschaftlicher Sicht eine Herausforderung dar. Eine Strategie zur weiteren Verbesserung des Wirkungsgrades ist die Kombination eines Halbleiters mit hoher Bandlücke (≈1.7 eV) mit einer c-Si-Einfachsolarzelle (1.1 eV) in einer Tandemkonfiguration mit vier Anschlüssen (4T). Vielversprechende Kandidaten sind Organometall-Halogenid-Perowskit-Materialien, die in letzter Zeit aufgrund ihrer potenziell niedrigen Herstellungskosten und hervorragenden optoelektronischen Eigenschaften große Aufmerksamkeit hervorgerufen haben. Perowskit/c-Si-Tandemsolarzellen haben bereits fast die fundamentale Wirkungsgrad-Grenze von c-Si-Single-Junction-Solarzellen überschritten, wobei weitere Verbesserungen absehbar sind. Um den Wirkungsgrad von Perowskit/c-Si-Tandemsolarzellen weiter zu verbessern, müssen einige zentrale Herausforderungen bewältigt werden. Diese Herausforderungen können in optische und elektrische Verluste kategorisiert werden. Zu den optischen Verlusten gehören parasitäre Absorptions- (vorwiegend durch die Elektroden aus transparentem leitfähigem Oxid (TCO)) und Reflexionsverluste innerhalb des Schichtstapels sowie die Verwendung einer nicht idealen Bandlücke des Perowskit-Absorbers. Elektrische Verluste entstehen durch nichtstrahlende Rekombinationsprozesse innerhalb des Bulk-Materials oder an den Grenzflächen innerhalb des Perowskit-Schichtstapels sowie durch nicht optimale Extraktion der erzeugten Ladungsträger.
Der Schwerpunkt dieser Arbeit liegt auf der Minimierung der optischen Verluste, indem ihr Ursprung untersucht und neue Strategien zu ihrer Überwindung entwickelt werden. Als Ausgangspunkt wird eine neuartige hauseigene und vielseitige, bei niedrigen Temperaturen prozessierbare, auf Nanopartikeln basierende Elektronentransportschicht entwickelt, um Perowskit-Einfachsolarzellen auf TCOs mit geringer parasitärer Absorption herzustellen. Perowskit-Solarzellen mit dieser Elektronentransportschicht weisen Wirkungsgrade von über 18% auf. Weiterhin werden in dieser Arbeit zur weiteren Verbesserung des Lichteinfangs in Tandem-Solarzellen neuartige nanophotonische Frontelektroden und alternative TCOs entwickelt. Zunächst wird gezeigt, dass die nanophotonischen Frontelektroden nicht nur die Kurzschlussstromdichte in der Perowskit-Top-Solarzelle verbessern, sondern auch die Transmission im nahen Infrarot-Bereich erhöhen und damit den Wirkungsgrad der c-Si-Bottom-Solarzelle stark verbessern. Zweitens werden qualitativ hochwertige alternative TCOs mit einer hauseigenen Sputter-Technik erforscht, die in Bezug auf Reflexions- und parasitäre Absorptionsverluste kommerziell erhältliche TCOs übertreffen. Diese Konzepte werden angewendet um hocheffiziente 4T-Perowskit/c-Si-Tandemsolarzellen mit Wirkungsgraden von bis zu 27.3% herzustellen, was nicht nur den derzeitigen Rekord-Wirkungsgrad von c-Si-Einfachsolarzellen übertrifft, sondern auch einer der bisher höchsten Werte für 4T-Perowskit/c-Si-Tandemarchitekturen ist. Darüber hinaus wird zum ersten Mal eine detaillierte experimentelle Untersuchung der optimalen Bandlücke des Perowskit-Absorbers in realistischen \u27state-of-the-art‘ 4T-Perowskit/c-Si und Perowskit/CIGS-Tandemsolarzellen durchgeführt. Es wird gezeigt, dass ein breiter Bereich von Bandlücken zwischen 1.65-1.74 eV zu ähnlichen Wirkungsgraden führt, was die Anforderungen an die exakte Bandlücke des Perowskit-Absorbers in hocheffizienten Tandemsolarzellen lockert
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