18,775 research outputs found
Random Quantum Circuits and Pseudo-Random Operators: Theory and Applications
Pseudo-random operators consist of sets of operators that exhibit many of the
important statistical features of uniformly distributed random operators. Such
pseudo-random sets of operators are most useful whey they may be parameterized
and generated on a quantum processor in a way that requires exponentially fewer
resources than direct implementation of the uniformly random set. Efficient
pseudo-random operators can overcome the exponential cost of random operators
required for quantum communication tasks such as super-dense coding of quantum
states and approximately secure quantum data-hiding, and enable efficient
stochastic methods for noise estimation on prototype quantum processors. This
paper summarizes some recently published work demonstrating a random circuit
method for the implementation of pseudo-random unitary operators on a quantum
processor [Emerson et al., Science 302:2098 (Dec.~19, 2003)], and further
elaborates the theory and applications of pseudo-random states and operators.Comment: This paper is a synopsis of Emerson et al., Science 302: 2098 (Dec
19, 2003) and some related unpublished work; it is based on a talk given at
QCMC04; 4 pages, 1 figure, aipproc.st
The Road to Quantum Computational Supremacy
We present an idiosyncratic view of the race for quantum computational
supremacy. Google's approach and IBM challenge are examined. An unexpected
side-effect of the race is the significant progress in designing fast classical
algorithms. Quantum supremacy, if achieved, won't make classical computing
obsolete.Comment: 15 pages, 1 figur
SANSCrypt: A Sporadic-Authentication-Based Sequential Logic Encryption Scheme
We propose SANSCrypt, a novel sequential logic encryption scheme to protect
integrated circuits against reverse engineering. Previous sequential encryption
methods focus on modifying the circuit state machine such that the correct
functionality can be accessed by applying the correct key sequence only once.
Considering the risk associated with one-time authentication, SANSCrypt adopts
a new temporal dimension to logic encryption, by requiring the user to
sporadically perform multiple authentications according to a protocol based on
pseudo-random number generation. Analysis and validation results on a set of
benchmark circuits show that SANSCrypt offers a substantial output
corruptibility if the key sequences are applied incorrectly. Moreover, it
exhibits an exponential resilience to existing attacks, including SAT-based
attacks, while maintaining a reasonably low overhead.Comment: This paper has been accepted at the 28th IFIP/IEEE International
Conference on Very Large Scale Integration (VLSI-SoC
PT-Symmetric Electronics
We show both theoretically and experimentally that a pair of inductively
coupled active LRC circuits (dimer), one with amplification and another with an
equivalent amount of attenuation, display all the features which characterize a
wide class of non-Hermitian systems which commute with the joint parity-time PT
operator: typical normal modes, temporal evolution, and scattering processes.
Utilizing a Liouvilian formulation, we can define an underlying PT-symmetric
Hamiltonian, which provides important insight for understanding the behavior of
the system. When the PT-dimer is coupled to transmission lines, the resulting
scattering signal reveals novel features which reflect the PT-symmetry of the
scattering target. Specifically we show that the device can show two different
behaviors simultaneously, an amplifier or an absorber, depending on the
direction and phase relation of the interrogating waves. Having an exact
theory, and due to its relative experimental simplicity, PT-symmetric
electronics offers new insights into the properties of PT-symmetric systems
which are at the forefront of the research in mathematical physics and related
fields.Comment: 17 pages, 7 figure
Characterization of dielectric charging in MEMS using Diffusive Representation
Postprint (author's final draft
An event-based architecture for solving constraint satisfaction problems
Constraint satisfaction problems (CSPs) are typically solved using
conventional von Neumann computing architectures. However, these architectures
do not reflect the distributed nature of many of these problems and are thus
ill-suited to solving them. In this paper we present a hybrid analog/digital
hardware architecture specifically designed to solve such problems. We cast
CSPs as networks of stereotyped multi-stable oscillatory elements that
communicate using digital pulses, or events. The oscillatory elements are
implemented using analog non-stochastic circuits. The non-repeating phase
relations among the oscillatory elements drive the exploration of the solution
space. We show that this hardware architecture can yield state-of-the-art
performance on a number of CSPs under reasonable assumptions on the
implementation. We present measurements from a prototype electronic chip to
demonstrate that a physical implementation of the proposed architecture is
robust to practical non-idealities and to validate the theory proposed.Comment: First two authors contributed equally to this wor
Kate's Model Verification Tools
Kennedy Space Center's Knowledge-based Autonomous Test Engineer (KATE) is capable of monitoring electromechanical systems, diagnosing their errors, and even repairing them when they crash. A survey of KATE's developer/modelers revealed that they were already using a sophisticated set of productivity enhancing tools. They did request five more, however, and those make up the body of the information presented here: (1) a transfer function code fitter; (2) a FORTRAN-Lisp translator; (3) three existing structural consistency checkers to aid in syntax checking their modeled device frames; (4) an automated procedure for calibrating knowledge base admittances to protect KATE's hardware mockups from inadvertent hand valve twiddling; and (5) three alternatives for the 'pseudo object', a programming patch that currently apprises KATE's modeling devices of their operational environments
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