Demand and Storage Management in a Prosumer Nanogrid Based on Energy Forecasting

Energy efficiency and consumers' role in the energy system are among the strategic research topics in power systems these days. Smart grids (SG) and, specifically, microgrids, are key tools for these purposes. This paper presents a three-stage strategy for energy management in a prosumer nanogrid. Firstly, energy monitoring is performed and time-space compression is applied as a tool for forecasting energy resources and power quality (PQ) indices; secondly, demand is managed, taking advantage of smart appliances (SA) to reduce the electricity bill; finally, energy storage systems (ESS) are also managed to better match the forecasted generation of each prosumer. Results show how these strategies can be coordinated to contribute to energy management in the prosumer nanogrid. A simulation test is included, which proves how effectively the prosumers' power converters track the power setpoints obtained from the proposed strategy.Spanish Agencia Estatal de Investigacion ; Fondo Europeo de Desarrollo Regional

Partial Discharge Testing and Detection under PWM Voltage

Partial Discharge detection and measurement is an important part of electric insulation design. However, in PWM (pulse width modulation) voltage source converter environments, the noise resulting from switching voltage (rise and fall times of tens of nanoseconds) makes detection and extraction of partial discharge difficult. Unique methods of partial discharge detection are needed to address and decouple the noise from partial discharge measurements. PWM voltage can feature high switching speeds and high dv/dt during voltage switching. These PWM voltage behaviors are not found in traditional utility high voltage applications, and the effects that this type of voltage has on insulation and associated partial discharge behavior are not well understood. A good understanding of partial discharge behavior is vital to effective insulation design in high voltage power electronic systems. \\ To better understand the behavior of partial discharge in a PWM voltage source environment, a partial discharge testing platform is designed. This testing platform features a 3kV Si half-bridge converter to apply PWM voltage at varying switching frequency (5-60kHz) and dv/dt (11-16V/ns). An additional full-bridge 10kV SiC converter provides extra voltage capability for partial discharge testing. Converters with wide bandgap semiconductors can feature high switching frequency and dv/dt not currently possible with Si converters. The effect that switching frequency and dv/dt has on partial discharge behavior will become more of an issue as wide bandgap semiconductors are operated at full potential. The output voltage from this converter will be applied to test subjects chosen to model types of partial discharge: surface, internal, and corona discharge. This testing platform requires an effective method of partial discharge detection that is not interfered by voltage switching transient noise. Three electrically isolated methods of detection are explored to determine the most effective methods of partial discharge detection in the presence of PWM voltage switching transient noise: optical detection, electromagnetic detection, and acoustic detection. Post-processing wavelet denoising techniques are applied to remove any remaining noise from partial discharge signals. With effective partial discharge detection and a testing platform with test subjects chosen to model types of discharge, the effects of PWM voltage on partial discharge behavior are demonstrated. Methods of partial discharge classification and identification are demonstrated as well to show methods to effectively identify defects in insulation caused by partial discharge due to PWM voltage

Multilevel Converters: An Enabling Technology for High-Power Applications

| Multilevel converters are considered today as the state-of-the-art power-conversion systems for high-power and power-quality demanding applications. This paper presents a tutorial on this technology, covering the operating principle and the different power circuit topologies, modulation methods, technical issues and industry applications. Special attention is given to established technology already found in industry with more in-depth and self-contained information, while recent advances and state-of-the-art contributions are addressed with useful references. This paper serves as an introduction to the subject for the not-familiarized reader, as well as an update or reference for academics and practicing engineers working in the field of industrial and power electronics.Ministerio de Ciencia y Tecnología DPI2001-3089Ministerio de Eduación y Ciencia d TEC2006-0386

Microprocessor based signal processing techniques for system identification and adaptive control of DC-DC converters

PhD ThesisMany industrial and consumer devices rely on switch mode power converters (SMPCs) to provide a reliable, well regulated, DC power supply. A poorly performing power supply can potentially compromise the characteristic behaviour, efficiency, and operating range of the device. To ensure accurate regulation of the SMPC, optimal control of the power converter output is required. However, SMPC uncertainties such as component variations and load changes will affect the performance of the controller. To compensate for these time varying problems, there is increasing interest in employing real-time adaptive control techniques in SMPC applications. It is important to note that many adaptive controllers constantly tune and adjust their parameters based upon on-line system identification. In the area of system identification and adaptive control, Recursive Least Square (RLS) method provide promising results in terms of fast convergence rate, small prediction error, accurate parametric estimation, and simple adaptive structure. Despite being popular, RLS methods often have limited application in low cost systems, such as SMPCs, due to the computationally heavy calculations demanding significant hardware resources which, in turn, may require a high specification microprocessor to successfully implement. For this reason, this thesis presents research into lower complexity adaptive signal processing and filtering techniques for on-line system identification and control of SMPCs systems. The thesis presents the novel application of a Dichotomous Coordinate Descent (DCD) algorithm for the system identification of a dc-dc buck converter. Two unique applications of the DCD algorithm are proposed; system identification and self-compensation of a dc-dc SMPC. Firstly, specific attention is given to the parameter estimation of dc-dc buck SMPC. It is computationally efficient, and uses an infinite impulse response (IIR) adaptive filter as a plant model. Importantly, the proposed method is able to identify the parameters quickly and accurately; thus offering an efficient hardware solution which is well suited to real-time applications. Secondly, new alternative adaptive schemes that do not depend entirely on estimating the plant parameters is embedded with DCD algorithm. The proposed technique is based on a simple adaptive filter method and uses a one-tap finite impulse response (FIR) prediction error filter (PEF). Experimental and simulation results clearly show the DCD technique can be optimised to achieve comparable performance to classic RLS algorithms. However, it is computationally superior; thus making it an ideal candidate technique for low cost microprocessor based applications.Iraq Ministry of Higher Educatio

Analysis of two level and three level inverters

The power electronics device which converts DC power to AC power at required output voltage and frequency level is known as inverter. Inverters can be broadly classified into single level inverter and multilevel inverter. Multilevel inverter as compared to single level inverters have advantages like minimum harmonic distortion, reduced MI/RFI generation and can operate on several voltage levels. A multi-stage inverter is being utilized for multipurpose applications, such as active power filters, static var compensators and machine drives for sinusoidal and trapezoidal current applications. The drawbacks are the isolated power supplies required for each one of the stages of the multiconverter and it’s also lot harder to build, more expensive, harder to control in software. This project aims at the simulation study of three phase single level and multilevel inverters. The role of inverters in active power filter for harmonic filtering is studied and simulated in MATLAB/SIMULINK. Firstly, the three phase system with non-linear loads are modeled and their characteristics is observed . Secondly, the active power filters are modeled with the inverters and suitable switching control strategies ( PWM technique) to carry out harmonic elimination

Modular Multilevel Cascaded Flying Capacitor STATCOM for Balanced and Unbalanced Load Compensation

Voltage and current unbalance are major problems in distribution networks, particularly with the integration of distributed generation systems. One way of mitigating these issues is by injecting negative sequence current into the distribution network using a Static Synchronous Compensator (STATCOM) which normally also regulates the voltage and power factor. The benefits of modularity and scalability offered by Modular Multilevel Cascaded Converters (MMCC) make them suitable for STATCOM application. A number of different types of MMCC may be used, classified according to the sub-module circuit topology used. Their performance features and operational ranges for unbalanced load compensation are evaluated and quantified in this research. This thesis investigates the use of both single star and single delta configured five-level Flying Capacitor (FC) converter MMCC based STATCOMs for unbalanced load compensation. A detailed study is carried out to compare this type of sub-module with several other types namely: half bridge, 3-L H-bridge and 3-L FC half bridge, and reveals the one best suited to STATCOM operation. With the choice of 5-L FC H-bridge as the sub-module for STATCOM operation, a detailed investigation is also performed to decide which pulse width modulation technique is the best. This was based on the assessment of total harmonic distortion, power loss, sub-module switch utilization and natural balancing of inner flying capacitors. Two new modulation techniques of swapped-carrier PWM (SC-PWM) along with phase disposed and phase shifted PWM (PS-PWM) are analyzed under these four performance metrics. A novel contribution of this research is the development of a new space vector modulation technique using an overlapping hexagon technique. This space vector strategy offers benefits of eliminating control complexity and improving waveform quality, unlike the case of multilevel space vector technique. The simulation and experimental results show that this method provides superior performance and is applicable for other MMCC sub-modules. Another contribution is the analysis and quantification of operating ranges of both single star and delta MMCCs in rating the cluster dc-link voltage (star) and current (delta) for unbalanced load compensation. A novel method of extending the operating capabilities of both configurations uses a third harmonic injection method. An experimental investigation validates the operating range extension compared to the pure sinusoidal zero sequence voltage and current injection. Also, the superiority of the single delta configured MMCC for unbalanced loading compensation is validated

Advanced Silicon Carbide Based Fault-Tolerant Multilevel Converters

The number of safety-critical loads in electric power areas have been increasing drastically in the last two decades. These loads include the emerging more-electric aircraft (MEA), uninterruptible power supplies (UPS), high-power medical instruments, electric and hybrid electric vehicles (EV/HEV) and ships for military use, electric space rovers for space exploration and the like. This dissertation introduces two novel fault-tolerant three-level power converter topologies, named advanced three-level active neutral point clamped converter (A3L-ANPC) and advanced three-level active T-Type (A3L-ATT) converter. The goal of these converters is to increase the reliability of multilevel power converters used in safety-critical applications.These new fault-tolerant multilevel power converters are derived from the conventional ANPC and T-Type converter topologies. The topologies has significantly improved the fault-tolerant capability under any open circuit or certain short-circuit faults in the power semiconductor devices. In addition, under healthy conditions, the redundant phase leg can be utilized to share overload current with other main legs, which enhances the overload capability of the converter. The conduction losses in the power devices can be reduced by sharing the load current with the redundant leg. Moreover, unlike other existing fault-tolerant power converters in the literature, full output voltages can be always obtained during fault-tolerant operation. Experimental prototypes of both the A3L-ANPC and A3L-ATT converters were built based on Silicon Carbide (SiC) MOSFETs. Experimental results confirmed the anticipated performance of the novel three-level converter topologies.SiC MOSFET technology is at the forefront of significant advances in electric power conversion. SiC MOSFETs switch significantly faster than the conventional Silicon counterparts resulting in power converters with higher efficiency and increased switching frequencies. Low switching losses are one of the key characteristics of SiC technology. In this dissertation, hard and soft switching losses of a high power SiC MOSFET module are measured and characterized at different voltage and current operating points to determine the maximum operating frequency of the module. The purpose of characterizing the SiC MOSFET module is to determine the feasibility of very high frequency (200kHz-1MHz) power conversion which may not be possible to be implemented in the conventional Silicon based high power conversion. The results show that higher switching frequencies are achievable with soft switching techniques in high power converters

Novel current-limiting strategy for solid-state circuit breakers (SSCB) without additional impedance

Current-limiting strategies for solid-state circuit breaker (SSCB) without adding impedance is introduced in this paper. With the current limitation of novel phase-shifting method, the advantages are simple hardware structure, relatively low cost, no heat generation, low weight and small size. Current-limiting capability is exploited with qualities of good control accuracy and robustness. The principle and theoretical analysis of phase-shifting current-limiting method are detailed introduced together with simulation/experimental verifications

Silicon Photonic Subsystems for Inter-Chip Optical Networks

The continuous growth of electronic compute and memory nodes in terms of the number of I/O pins, bandwidth, and areal throughput poses major integration and packaging challenges associated with offloading multi-Tbit/s data rates within the few pJ/bit targets. While integrated photonics are already deployed in long and short distances such as inter and intra data centers communications, the promising characteristics of the silicon photonic platform set it as the future technology for optical interconnects in ultra short inter-chip distances. The high index contrast between the waveguide and the cladding together with strong thermo-optic and carrier effects in silicon allows developing a wide range of micro-scale and low power optical devices compatible with the CMOS fabrication processes. Furthermore, the availability of photonic foundries and new electrical and optical co-packaging techniques further pushes this platform for the next steps of commercial deployment. The work in this dissertation presents the current trends in high-performance memory and processor nodes and gives motivation for disaggregated and reconfigurable inter-chip network enabled with the silicon photonic layer. A dense WDM transceiver and broadband switch architectures are discussed to support a bi-directional network of ten hybrid-memory cubes (HMC) interconnected to ten processor nodes with an overall aggregated bandwidth of 9.6Tbit/s. Latency and energy consumption are key performance parameters in a processor to primary memory nodes connectivity. The transceiver design is based on energy-efficient micro-ring resonators, and the broadband switch is constructed with 2x2 Mach-Zehnder elements for nano-second reconfiguration. Each transceiver is based on hundreds of micro-rings to convert the native HMC electrical protocol to the optical domain and the switch is based on tens of hundreds of 2x2 elements to achieve non-blocking all-to-all connectivity. The next chapters focus on developing methods for controlling and monitoring such complex and highly integrated silicon photonic subsystems. The thermo-optic effect is characterized and we show experimentally that the phase of the optical carrier can be reliably controlled with pulse-width modulation (PWM) signal, ultimately relaxing the need for hundreds of digital to analog converters (DACs). We further show that doped waveguide heaters can be utilized as \textit{in-line} optical power monitors by measuring photo-conductance current, which is an alternative for the conventional tapping and integration of photo-diodes. The next part concerned with a common cascaded micro-ring resonator in a WDM transceiver design. We develop on an FPGA control algorithm that abstracts the physical layer and takes user-defined inputs to set the resonances to the desired wavelength in a unicast and multicast transmission modes. The associated sensitivities of these silicon ring resonators are presented and addressed with three closed-loop solutions. We first show a closed-loop operation based on tapping the error signal from the drop port of the micro-ring. The second solution presents a resonance wavelength locking with a single digital I/O for control and feedback signals. Lastly, we leverage the photo-conductance effect and demonstrate the locking procedure using only the doped heater for both control and feedback purposes. To achieve the inter-chip reconfigurability we discuss recent advances of high-port-count SiP broadband switches for reconfigurable inter-chip networks. To ensure optimal operation in terms of low insertion loss, low cross-talk and high signal integrity per routing path, hundreds of 2x2 Mach-Zehnder elements need to be biased precisely for the cross and bar states. We address this challenge with a tapless and a design agnostic calibration approach based on the photo-conductance effect. The automated algorithm returns a look-up table for all for each 2x2 element and the associated calibrated biases. Each routing scenario is then tested for insertion loss, crosstalk and bit-error rate of 25Gbit/s 4-level pulse amplitude modulation signals. The last part utilizes the Mach-Zehnder interferometers in WDM transceiver applications. We demonstrate a polarization insensitive four-channel WDM receiver with 40Gbit/s per channel and a transmitter design generating 8-level pulse amplitude modulation signals at 30Gbit/s

High efficiency smart voltage regulating module for green mobile computing

This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.In this thesis a design for a smart high efficiency voltage regulating module capable of supplying the core of modern microprocessors incorporating dynamic voltage and frequency scaling (DVS) capability is accomplished using a RISC based microcontroller to facilitate all the functions required to control, protect, and supply the core with the required variable operating voltage as set by the DVS management system. Normally voltage regulating modules provide maximum power efficiency at designed peak load, and the efficiency falls off as the load moves towards lesser values. A mathematical model has been derived for the main converter and small signal analysis has been performed in order to determine system operation stability and select a control scheme that would improve converter operation response to transients and not requiring intense computational power to realize. A Simulation model was built using Matlab/Simulink and after experimenting with tuned PID controller and fuzzy logic controllers, a simple fuzzy logic control scheme was selected to control the pulse width modulated converter and several methods were devised to reduce the requirements for computational power making the whole system operation realizable using a low power RISC based microcontroller. The same microcontroller provides circuit adaptations operation in addition to providing protection to load in terms of over voltage and over current protection. A novel circuit technique and operation control scheme enables the designed module to selectively change some of the circuit elements in the main pulse width modulated buck converter so as to improve efficiency over a wider range of loads. In case of very light loads as the case when the device goes into standby, sleep or hibernation mode, a secondary converter starts operating and the main converter stops. The secondary converter adapts a different operation scheme using switched capacitor technique which provides high efficiency at low load currents. A fuzzy logic control scheme was chosen for the main converter for its lighter computational power requirement promoting implementation using ultra low power embedded controllers. Passive and active components were carefully selected to augment operational efficiency. These aspects enabled the designed voltage regulating module to operate with efficiency improvement in off peak load region in the range of 3% to 5%. At low loads as the case when the computer system goes to standby or sleep mode, the efficiency improvent is better than 13% which will have noticeable contribution in extending battery run time thus contributing to lowering the carbon footprint of human consumption