Transient augmentation circuit for pulse amplifiers Patent

Digital data handling circuits for pulse amplifier

Large step down voltage converters for desalination

One percent of the world's drinking water is currently desalinated, and this will have to increase to 14% by 2025. Desalination is energy intensive, having significant commercial and ecological implications. One of the most promising methods of desalination is capacitive deionisation which only uses 1kWh/m3 but requires a voltage of less than 1.8V at currents of up to 1000A This thesis produced hardware capable of creating 550A at a voltage of 1.8V, giving over a 1kW power rating, with an input voltage of 340V dc. The converter designed was a bidirectional asymmetrical half-bridge flyback converter allowing for isolation at these high step down ratios. The converter was used to charge a bank of 17,000F supercapacitors from 0V to 1.8V, with an initial charging step down ratio in excess of 340:1 falling to 190:1 as the load charged. A novel Asymmetrical Half-Bridge Coupled-Inductor Buck converter is presented as the ideal solution for large step-down ratios with analysis comparing the ability to efficiently step down a voltage with other common converters, the buck and flyback converters. A comparison between a single-ended coupled-inductor buck converter employing a buck-boost voltage clamp and the novel asymmetrical half-bridge coupled-inductor buck converter circuit shows that the asymmetrical half-bridge converter is a more efficient circuit as leakage energy is recovered; the switch voltages are clamped to within the dc voltage rating of the bridge and the control strategy is simple. Passive and active snubbers are reviewed for efficiency, switch ratings and management of the effects of leakage inductance and compared against the novel designs presented. In the desalination application isolation is required so the flyback circuit is used. An isolated three switch bidirectional converter is constructed using silicon carbide MOSFETs and diodes switching at 40kHz. The converter uses novel current measuring techniques, an on-board microprocessor and closed loop control designed into the final DC-DC converter.One percent of the world's drinking water is currently desalinated, and this will have to increase to 14% by 2025. Desalination is energy intensive, having significant commercial and ecological implications. One of the most promising methods of desalination is capacitive deionisation which only uses 1kWh/m3 but requires a voltage of less than 1.8V at currents of up to 1000A This thesis produced hardware capable of creating 550A at a voltage of 1.8V, giving over a 1kW power rating, with an input voltage of 340V dc. The converter designed was a bidirectional asymmetrical half-bridge flyback converter allowing for isolation at these high step down ratios. The converter was used to charge a bank of 17,000F supercapacitors from 0V to 1.8V, with an initial charging step down ratio in excess of 340:1 falling to 190:1 as the load charged. A novel Asymmetrical Half-Bridge Coupled-Inductor Buck converter is presented as the ideal solution for large step-down ratios with analysis comparing the ability to efficiently step down a voltage with other common converters, the buck and flyback converters. A comparison between a single-ended coupled-inductor buck converter employing a buck-boost voltage clamp and the novel asymmetrical half-bridge coupled-inductor buck converter circuit shows that the asymmetrical half-bridge converter is a more efficient circuit as leakage energy is recovered; the switch voltages are clamped to within the dc voltage rating of the bridge and the control strategy is simple. Passive and active snubbers are reviewed for efficiency, switch ratings and management of the effects of leakage inductance and compared against the novel designs presented. In the desalination application isolation is required so the flyback circuit is used. An isolated three switch bidirectional converter is constructed using silicon carbide MOSFETs and diodes switching at 40kHz. The converter uses novel current measuring techniques, an on-board microprocessor and closed loop control designed into the final DC-DC converter

Novel Rail Clamp Architectures and Their Systematic Design

abstract: Rail clamp circuits are widely used for electrostatic discharge (ESD) protection in semiconductor products today. A step-by-step design procedure for the traditional RC and single-inverter-based rail clamp circuit and the design, simulation, implementation, and operation of two novel rail clamp circuits are described for use in the ESD protection of complementary metal-oxide-semiconductor (CMOS) circuits. The step-by-step design procedure for the traditional circuit is technology-node independent, can be fully automated, and aims to achieve a minimal area design that meets specified leakage and ESD specifications under all valid process, voltage, and temperature (PVT) conditions. The first novel rail clamp circuit presented employs a comparator inside the traditional circuit to reduce the value of the time constant needed. The second circuit uses a dynamic time constant approach in which the value of the time constant is dynamically adjusted after the clamp is triggered. Important metrics for the two new circuits such as ESD performance, latch-on immunity, clamp recovery time, supply noise immunity, fastest power-on time supported, and area are evaluated over an industry-standard PVT space using SPICE simulations and measurements on a fabricated 40 nm test chip.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

An Energy-Efficient, Dynamic Voltage Scaling Neural Stimulator for a Proprioceptive Prosthesis

Accepted versio

Control And Topology Improvements In Half-bridge Dc-dc Converters

Efficiency and transient response are two key requirements for DC-DC converters. Topology and control are two key topics in this dissertation. A variety of techniques for DC-DC converter performance improvement are presented in this work. Focusing on the efficiency issue, a variety of clamping techniques including both active and passive methods are presented after the ringing issues in DC-DC converters are investigated. By presenting the clamping techniques, a big variety of energy management concepts are introduced. The active bridge-capacitor tank clamping and FET-diode-capacitor tank clamping are close ideas, which transfer the leakage inductor energy to clamping capacitor to prevent oscillation between leakage inductor and junction capacitor of MOSFETs. The two-FET-clamping tank employs two MOSFETs to freewheeling the leakage current when the main MOSFETs of the half-bridge are both off. Driving voltage variation on the secondary side Synchronous Rectifier (SR) MOSFETs in self-driven circuit due to input voltage variation in bus converter applications is also investigated. One solution with a variety of derivations is proposed using zerner-capacitor combination to clamping the voltage while maintaining reasonable power losses. Another efficiency improvement idea comes from phase-shift concept in DC-DC converters. By employing phase-shift scheme, the primary side and the secondary side two MOSFETs have complementary driving signals respectively, which allow the MOSFET to be turned on with Zero Voltage Switching (ZVS). Simulation verified the feasibility of the proposed phase-shifted DC-DC converter. From the control scheme point of view, a novel peak current mode control concept for half-bridge topologies is presented. Aiming at compensating the imbalanced voltage due to peak current mode control in symmetric half-bridge topologies, an additional voltage compensation loop is used to bring the half-bridge capacitor voltage back to balance. In the proposed solutions, one scheme is applied on symmetric half-bridge topology and the other one is applied on Duty-cycle-shifted (DCS) half-bridge topology. Both schemes employ simple circuitry and are suitable for integration. Loop stability issues are also investigated in this work. Modeling work shows the uncompensated half-bridge topology cannot be stabilized under all conditions and the additional compensation loop helps to prevent the voltage imbalance effectively

Reliable solid-state circuits Semiannual report no. 2, Jun. 1 - Nov. 30, 1965

Pulse width modulator and other microminiaturized electronic equipment for space age application

Assessment of novel power electronic converters for drives applications

Phd ThesisIn the last twenty years, industrial and academic research has produced over one hundred new converter topologies for drives applications. Regrettably, most of the published work has been directed towards a single topology, giving an overall impression of a large number of unconnected, competing techniques. To provide insight into this wide ranging subject area, an overview of converter topologies is presented. Each topology is classified according to its mode of operation and a family tree is derived encompassing all converter types. Selected converters in each class are analysed, simulated and key operational characteristics identified. Issues associated with the practical implementation of analysed topologies are discussed in detail. Of all AC-AC conversion techniques, it is concluded that softswitching converter topologies offer the most attractive alternative to the standard hard switched converter in the power range up to 100kW because of their high performance to cost ratio. Of the softswitching converters, resonant dc-link topologies are shown to produce the poorest output performance although they offer the cheapest solution. Auxiliary pole commutated inverters, on the other hand, can achieve levels of performance approaching those of the hard switched topology while retaining the benefits of softswitching. It is concluded that the auxiliary commutated resonant pole inverter (ACPI) topology offers the greatest potential for exploitation in spite of its relatively high capital cost. Experimental results are presented for a 20kW hard switched inverter and an equivalent 20kW ACPI. In each case the converter controller is implanted using a digital signal processor. For the ACPI, a new control scheme, which eliminates the need for switch current and voltage sensors, is implemented. Results show that the ACPI produces lower overall losses when compared to its hardswitching counterpart. In addition, device voltage stress, output dv/dt and levels of high frequency output harmonics are all reduced. Finally, it is concluded that modularisation of the active devices, optimisation of semiconductor design and a reduction in the number of additional sensors through the use of novel control methods, such as those presented, will all play a part in the realisation of an economically viable system.Research Committee of the University of Newcastle upon Tyn