3 research outputs found
Improving robustness of dynamic logic based pipelines
Domino dynamic circuits are widely used in
critical parts of high performance systems. In this paper we show
that, in addition to the functional limitation associated to the noninverting
behavior of Domino gates, there are also robustness
disadvantages when compared to inverting dynamic gates. We
analyze and compare the tolerance to parameter and operating
conditions variations of gate-level pipelines implemented with
Domino and with DOE, an inverting dynamic gate we have
recently proposed. Our experiments confirm that DOE pipelines
are more robust and that improvements are due to its noninverting
feature.Ministerio de Economía y Competitividad FEDER TEC2013-40670-
Improving robustness of dynamic logic based pipelines
Domino dynamic circuits are widely used in
critical parts of high performance systems. In this paper we show
that, in addition to the functional limitation associated to the noninverting
behavior of Domino gates, there are also robustness
disadvantages when compared to inverting dynamic gates. We
analyze and compare the tolerance to parameter and operating
conditions variations of gate-level pipelines implemented with
Domino and with DOE, an inverting dynamic gate we have
recently proposed. Our experiments confirm that DOE pipelines
are more robust and that improvements are due to its noninverting
feature.Peer reviewe
Novel dynamic gate topology for superpipelines in DSM technologies
Dynamic logic is well suited to implement very fine-grained pipelining for high performance functional units and has been successfully applied in commercial applications. Technology scaling and current increasing frequency targets have augmented the main problems exhibited by conventional dynamic gates topologies: larger leakage and coupling leading to higher noise susceptibility, logic design constrained by their functional limitation, being able to implement only non inverting functions and the labor-intensive design required due to timing challenges of fine grained pipelines used for high throughput. Development of novel topologies aiming to cope with all these challenges is an area of active research. In this paper, we describe a novel topology that addresses all the above stated problems. The proposed gate implements inverting functionalities, exhibits very competitive delay-noise tradeoffs and it is well suited to implement building blocks with function-independent delays which can simplify design. Unlike previous reported solutions, it is the gate static output stage which is modified. The novel topology is analyzed and evaluated, and the Carry-Merge chain of a Kogge-Stone adder is designed as an application example.Peer Reviewe