Channelization for Multi-Standard Software-Defined Radio Base Stations

As the number of radio standards increase and spectrum resources come under more pressure, it becomes ever less efficient to reserve bands of spectrum for exclusive use by a single radio standard. Therefore, this work focuses on channelization structures compatible with spectrum sharing among multiple wireless standards and dynamic spectrum allocation in particular. A channelizer extracts independent communication channels from a wideband signal, and is one of the most computationally expensive components in a communications receiver. This work specifically focuses on non-uniform channelizers suitable for multi-standard Software-Defined Radio (SDR) base stations in general and public mobile radio base stations in particular. A comprehensive evaluation of non-uniform channelizers (existing and developed during the course of this work) shows that parallel and recombined variants of the Generalised Discrete Fourier Transform Modulated Filter Bank (GDFT-FB) represent the best trade-off between computational load and flexibility for dynamic spectrum allocation. Nevertheless, for base station applications (with many channels) very high filter orders may be required, making the channelizers difficult to physically implement. To mitigate this problem, multi-stage filtering techniques are applied to the GDFT-FB. It is shown that these multi-stage designs can significantly reduce the filter orders and number of operations required by the GDFT-FB. An alternative approach, applying frequency response masking techniques to the GDFT-FB prototype filter design, leads to even bigger reductions in the number of coefficients, but computational load is only reduced for oversampled configurations and then not as much as for the multi-stage designs. Both techniques render the implementation of GDFT-FB based non-uniform channelizers more practical. Finally, channelization solutions for some real-world spectrum sharing use cases are developed before some final physical implementation issues are considered

Arquiteturas paralelas avançadas para transmissores 5G totalmente digitais

The fifth generation of mobile communications (5G) is being prepared and should be rolled out in the early coming years. Massive number of Radio-Frequency (RF) front-ends, peak data rates of 10 Gbps (everywhere and everytime), latencies lower than 10 msec and huge device densities are some of the expected disruptive capabilities. At the same time, previous generations can not be jeopardized, fostering the design of novel flexible and highly integrated radio transceivers able to support the simultaneous transmission of multi-band and multi-standard signals. The concept of all-digital transmission is being pointed out as a promising architecture to cope with such challenging requirements, due to its fully digital radio datapath. This thesis is focused on the proposal and validation of fully integrated and advanced digital transmitter architectures that excel the state-of-the-art in different figures of merit, such as transmission bandwidth, spectral purity, carrier agility, flexibility, and multi-band capability. The first part of this thesis introduces the concept of all-digital RF transmission. In particular, the foundations inherent to this thematic line are given, together with the recent advances reported in the state-of-the-art architectures.The core of this thesis, containing the main developments achieved during the Ph.D. work, is then presented and discussed. The first key contribution to the state-of-the-art is the use of cascaded Delta-Sigma (∆Σ) architectures to relax the analog filtering requirements of the conventional All-Digital Transmitters while maintaining the constant envelope waveform. Then, it is presented the first reported architecture where Antenna Arrays are directly driven by single-chip and single-bit All-Digital Transmitters, with promising results in terms of simplification of the RF front-ends and overall flexibility. Subsequently, the thesis proposes the first reported RF-stage All-Digital Transmitter that can be embedded within a single Field-Programmable Gate Array (FPGA) device. Thereupon, novel techniques to enable the design of wideband All-Digital Transmitters are reported. Finally, the design of concurrent multi-band transmitters is introduced. In particular, the design of agile and flexible dual and triple bands All-DigitalTransmitter (ADT) is demonstrated, which is a very important topic for scenarios that demand carrier aggregation. This Ph.D. contributes withseveral advances to the state-of-the-art of RF all-digital transmitters.A quinta geração de comunicações móveis (5G) está a ser preparada e deve ser comercializada nos próximos anos. Algumas das caracterı́sticas inovadoras esperadas passam pelo uso de um número massivo de font-ends de Rádio-Frequência (RF), taxas de pico de transmissão de dados de 10 Gbps (em todos os lugares e em todas as ocasiões), latências inferiores a 10 mseg e elevadas densidades de dispositivos. Ao mesmo tempo, as gerações anteriores não podem ser ignoradas, fomentando o design de novos transceptores de rádio flexı́veis e altamente integrados, capazes de suportar a transmissão simultânea de sinais multi-banda e multi-standard. O conceito de transmissão totalmente digital é considerado como um tipo de arquitetura promissora para lidar com esses requisitos desafiantes, devido ao seu datapath de rádio totalmente digital. Esta tese é focada na proposta e validação de arquiteturas de transmissores digitais totalmente integradas e avançadas que ultrapassam o estado da arte em diferentes figuras de mérito, como largura de banda de transmissão, pureza espectral, agilidade de portadora, flexibilidade e capacidade multibanda. A primeira parte desta tese introduz o conceito de transmissores de RF totalmente digitais. Em particular, os fundamentos inerentes a esta linha temática são apresentados, juntamente com os avanços mais recentes do estado-da-arte. O núcleo desta tese, contendo os principais desenvolvimentos alcançados durante o trabalho de doutoramento, é então apresentado e discutido. A primeira contribuição fundamental para o estado da arte é o uso de arquiteturas em cascata com moduladores ∆Σ para relaxar os requisitos de filtragem analógica dos transmissores RF totalmente digitais convencionais, mantendo a forma de onda envolvente constante. Em seguida, é apresentada a primeira arquitetura em que agregados de antenas são excitados diretamente por transmissores digitais de um único bit inseridos num único chip, com resultados promissores em termos de simplificação dos front-ends de RF e flexibilidade em geral. Posteriormente, é proposto o primeiro transmissor totalmente digital RF-stage relatado que pode ser incorporado dentro de um único Agregado de Células Lógicas Programáveis. Novas técnicas para permitir o desenho de transmissores RF totalmente digitais de banda larga são também apresentadas. Finalmente, o desenho de transmissores simultâneos de múltiplas bandas é exposto. Em particular, é demonstrado o desenho de transmissores de duas e três bandas ágeis e flexı́veis, que é um tópico essencial para cenários que exigem agregação de múltiplas bandas.Apoio financeiro da Fundação para a Ciência e Tecnologia (FCT) no âmbito de uma bolsa de doutoramento, ref. PD/BD/105857/2014.Programa Doutoral em Telecomunicaçõe

Programming techniques for efficient and interoperable software defined radios

Recently, Software-Dened Radios (SDRs) has became a hot research topic in wireless communications eld. This is jointly due to the increasing request of reconfigurable and interoperable multi-standard radio systems able to learn from their surrounding environment and efficiently exploit the available frequency spectrum resources, so realizing the cognitive radio paradigm, and to the availability of reprogrammable hardware architectures providing the computing power necessary to meet the tight real-time constraints typical of the state-of-art wideband communications standards. Most SDR implementations are based on mixed architectures in which Field Programmable Gate Arrays (FPGA), Digital Signal Processors (DSP) and General Purpose Processors (GPP) coexist. GPP-based solutions, even if providing the highest level of flexibility, are typically avoided because of their computational inefficiency and power consumption. Starting from these assumptions, this thesis tries to jointly face two of the main important issues in GPP-based SDR systems: the computational efficiency and the interoperability capacity. In the first part, this thesis presents the potential of a novel programming technique, named Memory Acceleration (MA), in which the memory resources typical of GPP-based systems are used to assist central processor in executing real-time signal processing operations. This technique, belonging to the classical computer-science optimization techniques known as Space-Time trade-offs, defines novel algorithmic methods to assist developers in designing their software-defined signal processing algorithms. In order to show its applicability some "real-world" case studies are presented together with the acceleration factor obtained. In the second part of the thesis, the interoperability issue in SDR systems is also considered. Existing software architectures, like the Software Communications Architecture (SCA), abstract the hardware/software components of a radio communications chain using a middleware like CORBA for providing full portability and interoperability to the implemented chain, called waveform in the SCA parlance. This feature is paid in terms of computational overhead introduced by the software communications middleware and this is one of the reasons why GPP-based architecture are generally discarded also for the implementation of narrow-band SCA-compliant communications standards. In this thesis we briefly analyse SCA architecture and an open-source SCA-compliant framework, ie. OSSIE, and provide guidelines to enable component-based multithreading programming and CPU affinity in that framework. We also detail the implementation of a real-time SCA-compliant waveform developed inside this modified framework, i.e. the VHF analogue aeronautical communications transceiver. Finally, we provide the proof of how it is possible to implement an efficient and interoperable real-time wideband SCA-compliant waveform, i.e. the AeroMACS waveform, on a GPP-based architecture by merging the acceleration factor provided by MA technique and the interoperability feature ensured by SCA architecture

Novas arquiteturas para transmissores digitais flexíveis e de banda larga

Next generation of wireless communication (5G) devices must achieve higher data rates, lower power consumption and better coverage by making a more efficient use of the RF spectrum and adopting highly exible radio architectures. To meet these requirements, the development of new radio devices will be far more complex and challenging than their predecessors. The future of radio communications have a twofold evolution, being one the low power consumption and the other the adaptability and intelligent use of the available resources. Conventional approaches for the radio physical layer are not capable to cope with the new demand for multi-band, multi-standard radio signals and present an inefficient and expensive solution for simultaneous transmission of multiple and heterogeneous radio signals. Digital radio transmitters have been presented as a solution for a newer and more exible architecture for future radios. All-digital transmitters use a completely digital implementation of the entire radio datapath from the baseband processing to the digital RF up-conversion. This concept bene ts from the use of highly integrated hardware together with a strong radio digitalization, motivated by the exibility and high performance from cognitive and software defi ned radio. However, such devices are still far from a massive deployment in most of communication scenarios due to some limiting factors that hinder their use. This PhD thesis aims to the development of novel radio architectures and ideas based on all-digital transmitters capable of improving the adaptability and use intelligently the available resources for software de ned and cognitive radio systems. The focus of this thesis is on the improvement of some of the common limitations for all-digital transmitters such as power efficiency, bandwidth, noise-shaping and exibility while using efficient and adaptable digital architectures. In the initial part of the thesis a review of the state-of-the-art is presented showing the most common digital transmitter architectures as well as their major bene ts and key limitations. A comparative analysis of such architectures is made considering their power and spectral efficiency, exibility, performance and cost. Following this initial analysis, the work developed on the course of this PhD is presented and discussed. The initial focus is on the improvement of all-digital transmitters bandwidth trough the study and use of parallel processing techniques capable of greatly improve common bandwidth values presented in the state-of-the-art. The presented work has resulted in several publications where FPGA-based architectures use parallel digital processing techniques to improve the system's bandwidth by a factor higher than 10. Other fundamental contribution of this thesis is focused on the pulsedtransmitters coding efficiency. In this section of the thesis, a method is presented showing the reduction of the quantization noise created by low amplitude resolution digital transmitters using multiple combined pulsedtransmitters to cancel the noise in speci c frequencies. This work has resulted in two main publications that showed how to increase the coding efficiency of the pulse-transmitters as well as the overall efficiency of the transmission system. Lastly, new-noise shaping methods are presented in order to develop new and more exible architectures for all-digital transmitters. The methods presented use new quantization processes that allow for the shaping of the quantization noise produced in pulsed-transmitters while using very simple and adaptable architectures. With these new techniques, it is possible to adjust the noise frequency distribution and deliberately change the noise shape in order to change some of the transmitter's characteristics such as central frequency or bandwidth. The work presented on this thesis has shown promising improvements to the all-digital transmitters' state-of-the-art, either in simulations and laboratory prototype measurements. It has contributed to advance the state-of-the-art in agile and power efficient all-digital RF transmitters with multi-mode and multi-channel capabilities and the improvement of the transceiver's bandwidth enabling the development of true software de ned and cognitive radio systemsA próxima geração de comunicações sem os (5G) exigirá taxas de transmissão mais elevadas, maior efi ciência energética e uma melhor cobertura fazendo um uso mais efi ciente do espectro de radiofrequência e adotando o uso de arquiteturas rádio mais flexíveis. Para cumprir tais requisitos, o desenvolvimento de novos dispositivos rádio será substancialmente mais complexo do que nas gerações anteriores. O futuro das comunicações rádio depende maioritariamente de dois fatores; o baixo consumo de potência e o uso inteligente dos recursos e tecnologias disponíveis. As abordagens convencionais para a camada física dos sistemas rádio não são as mais adequadas para lidar com a necessidade de dispositivos multi-banda e que usem múltiplos standards, por serem soluções inefi cientes e demasiado caras para esse efeito. Os transmissores rádio completamente digitais têm vindo a ser apresentados na literatura como uma solução inovadora e mais flexível para a implementação dos futuros sistemas de rádio. Os transmissores completamente digitais apresentam uma implementação da cadeia de processamento rádio, desde a banda-base até à conversão para RF, completamente constituída por lógica digital. Este conceito tira partido da vasta integração alcançada nas arquiteturas digitais, juntamente com a flexibilidade proveniente da digitalização das arquiteturas rádio que já se encontra em curso com a evolução dos rádios cognitivos e definidos por software. No entanto, devido a algumas limitações inerentes à tecnologia, este tipo de transmissores ainda não é amplamente utilizado na maioria dos sistemas. Esta tese de doutoramento propõe e avalia novas arquiteturas para transmissores completamente digitais, bem como novas técnicas de processamento de sinal que possam beneficiar das tecnologias de implementação existentes (e.g. FPGAs) por forma a construir novos transmissores digitais de forma eficiente e flexível. O objetivo desta tese é reduzir as limitações atuais ainda presentes neste tipo de transmissores, nomeadamente as relacionadas com a eficiência, largura de banda, cancelamento de ruído e falta de flexibilidade. Na parte inicial desta tese é realizada a revisão do estado da arte das diversas topologias de transmissores digitais bem como as suas principais vantagens e limitações técnicas. É também feita uma análise comparativa das diversas técnicas apresentadas em termos da sua eficiência energética, flexibilidade, desempenho e custo. De seguida, é apresentado o trabalho desenvolvido no contexto desta tese de doutoramento, seguindo-se uma discussão focada na resolução das atuais limitações deste tipo de transmissores. A primeira parte foca-se no uso de técnicas de processamento paralelo de sinal, por forma a suportar sinais de largura de banda mais elevada que os reportados no atual estado da arte. O trabalho desenvolvido e publicado baseia-se no uso de arquiteturas implementadas em FPGA que contribuíram para um aumento da largura de banda num fator de aproximadamente dez vezes. Outra das contribuições fundamentais desta tese consiste no aumento da eficiência do sistema através da melhoria da eficiência de codificação do sinal pulsado produzido. Com base no uso de múltiplos transmissores pulsados, e apresentado um esquema de combinação construtiva e destrutiva de sinais para a redução do ruído de quantização proveniente das técnicas de processamento de sinal pulsado usadas. Este trabalho resultou em duas importantes publicações que mostram que a melhoria da eficiência de codificação do sinal pode ser utilizada de forma a obter uma maior eficiência energética do transmissor. Por ultimo, são apresentadas diversas técnicas para a conversão dos sinais banda-base em sinais RF pulsados. As propostas apresentadas permitem o uso de uma arquitetura de hardware simplista, mas configurável por software, o que a torna bastante flexível. Com o uso desta arquitetura e possível alterar em pleno funcionamento a frequência central bem como a largura de banda e resposta do conversor pulsado. O trabalho apresentado nesta tese demonstra alguns dos melhoramentos no estado da arte para transmissores r adio completamente digitais, baseando os resultados obtidos não apenas em simulações mas também na implementação e medidas realizadas sobre protótipos laboratoriais. O trabalho desenvolvido no âmbito desta tese contribuiu com avanços na implementação de transmissores ageis, eficientes, com maior largura de banda e capazes de transmissão em múltiplas bandas com recurso a múltiplos protocolos, abrindo caminho para o desenvolvimento de novos rádios cognitivos e definidos por softwareFCT, FSEPrograma Doutoral em Engenharia Eletrotécnic

A Secure, Configurable, Wireless System for Transfer of Sensor Data from Aircraft to Ground

Modern aircraft are complex systems, equipped with hundreds of embedded sensors that record a wide repertoire of data during flight, such as crucial engine and airframe parameters, status of flight control system, air conditioning system, landing gear, life-saving and emergency systems. The data from the sensors is stored in the Flight Data Recorder. Maintenance personnel routinely transfer this sensor data to a ground terminal device to analyze it for aircraft health and performance monitoring purposes. Manual methods of extracting sensor data can be tedious and error-prone when large fleets of aircraft are involved. This paper presents a novel system to extract sensor data from aircraft to a ground terminal, wirelessly. The wireless system is implemented using unique, configurable wireless transmitter receivers (WTRs) designed for this purpose. The hardware for the wireless transfer of data was designed, interfaced with a modern aircraft’s system, and tested with the aircraft on the ground and another flying object. The data from the aircraft’s Flight Data Recorder was successfully transmitted and received wirelessly by the ground terminal, over a distance of 50 meters (with aircraft on ground) and 10 Kilometers (with a flying object), in a secure mode with zero packet loss. The WTRs have also qualified the requisite tests for airborne certification

Continuous-Time and Companding Digital Signal Processors Using Adaptivity and Asynchronous Techniques

The fully synchronous approach has been the norm for digital signal processors (DSPs) for many decades. Due to its simplicity, the classical DSP structure has been used in many applications. However, due to its rigid discrete-time operation, a classical DSP has limited efficiency or inadequate resolution for some emerging applications, such as processing of multimedia and biological signals. This thesis proposes fundamentally new approaches to designing DSPs, which are different from the classical scheme. The defining characteristic of all new DSPs examined in this thesis is the notion of "adaptivity" or "adaptability." Adaptive DSPs dynamically change their behavior to adjust to some property of their input stream, for example the rate of change of the input. This thesis presents both enhancements to existing adaptive DSPs, as well as new adaptive DSPs. The main class of DSPs that are examined throughout the thesis are continuous-time (CT) DSPs. CT DSPs are clock-less and event-driven; they naturally adapt their activity and power consumption to the rate of their inputs. The absence of a clock also provides a complete avoidance of aliasing in the frequency domain, hence improved signal fidelity. The core of this thesis deals with the complete and systematic design of a truly general-purpose CT DSP. A scalable design methodology for CT DSPs is presented. This leads to the main contribution of this thesis, namely a new CT DSP chip. This chip is the first general-purpose CT DSP chip, able to process many different classes of CT and synchronous signals. The chip has the property of handling various types of signals, i.e. various different digital modulations, both synchronous and asynchronous, without requiring any reconfiguration; such property is presented for the first time CT DSPs and is impossible for classical DSPs. As opposed to previous CT DSPs, which were limited to using only one type of digital format, and whose design was hard to scale for different bandwidths and bit-widths, this chip has a formal, robust and scalable design, due to the systematic usage of asynchronous design techniques. The second contribution of this thesis is a complete methodology to design adaptive delay lines. In particular, it is shown how to make the granularity, i.e. the number of stages, adaptive in a real-time delay line. Adaptive granularity brings about a significant improvement in the line's power consumption, up to 70% as reported by simulations on two design examples. This enhancement can have a direct large power impact on any CT DSP, since a delay line consumes the majority of a CT DSP's power. The robust methodology presented in this thesis allows safe dynamic reconfiguration of the line's granularity, on-the-fly and according to the input traffic. As a final contribution, the thesis also examines two additional DSPs: one operating the CT domain and one using the companding technique. The former operates only on level-crossing samples; the proposed methodology shows a potential for high-quality outputs by using a complex interpolation function. Finally, a companding DSP is presented for MPEG audio. Companding DSPs adapt their dynamic range to the amplitude of their input; the resulting can offer high-quality outputs even for small inputs. By applying companding to MPEG DSPs, it is shown how the DSP distortion can be made almost inaudible, without requiring complex arithmetic hardware

On detection of OFDM signals for cognitive radio applications

As the requirement for wireless telecommunications services continues to grow, it has become increasingly important to ensure that the Radio Frequency (RF) spectrum is managed efficiently. As a result of the current spectrum allocation policy, it has been found that portions of RF spectrum belonging to licensed users are often severely underutilised, at particular times and geographical locations. Awareness of this problem has led to the development of Dynamic Spectrum Access (DSA) and Cognitive Radio (CR) as possible solutions. In one variation of the shared-use model for DSA, it is proposed that the inefficient use of licensed spectrum could be overcome by enabling unlicensed users to opportunistically access the spectrum when the licensed user is not transmitting. In order for an unlicensed device to make decisions, it must be aware of its own RF environment and, therefore, it has been proposed that DSA could been abled using CR. One approach that has be identified to allow the CR to gain information about its operating environment is spectrum sensing. An interesting solution that has been identified for spectrum sensing is cyclostationary detection. This property refers to the inherent periodic nature of the second order statistics of many communications signals. One of the most common modulation formats in use today is Orthogonal Frequency Division Multiplexing (OFDM), which exhibits cyclostationarity due to the addition of a Cyclic Prefix (CP). This thesis examines several statistical tests for cyclostationarity in OFDM signals that may be used for spectrum sensing in DSA and CR. In particular, focus is placed on statistical tests that rely on estimation of the Cyclic Autocorrelation Function (CAF). Based on splitting the CAF into two complex component functions, several new statistical tests are introduced and are shown to lead to an improvement in detection performance when compared to the existing algorithms. The performance of each new algorithm is assessed in Additive White Gaussian Noise (AWGN), impulsive noise and when subjected to impairments such as multipath fading and Carrier Frequency Offset (CFO). Finally, each algorithm is targeted for Field Programmable Gate Array (FPGA) implementation using a Xilinx 7 series device. In order to keep resource costs to a minimum, it is suggested that the new algorithms are implemented on the FPGA using hardware sharing, and a simple mathematical re-arrangement of certain tests statistics is proposed to circumvent a costly division operation.As the requirement for wireless telecommunications services continues to grow, it has become increasingly important to ensure that the Radio Frequency (RF) spectrum is managed efficiently. As a result of the current spectrum allocation policy, it has been found that portions of RF spectrum belonging to licensed users are often severely underutilised, at particular times and geographical locations. Awareness of this problem has led to the development of Dynamic Spectrum Access (DSA) and Cognitive Radio (CR) as possible solutions. In one variation of the shared-use model for DSA, it is proposed that the inefficient use of licensed spectrum could be overcome by enabling unlicensed users to opportunistically access the spectrum when the licensed user is not transmitting. In order for an unlicensed device to make decisions, it must be aware of its own RF environment and, therefore, it has been proposed that DSA could been abled using CR. One approach that has be identified to allow the CR to gain information about its operating environment is spectrum sensing. An interesting solution that has been identified for spectrum sensing is cyclostationary detection. This property refers to the inherent periodic nature of the second order statistics of many communications signals. One of the most common modulation formats in use today is Orthogonal Frequency Division Multiplexing (OFDM), which exhibits cyclostationarity due to the addition of a Cyclic Prefix (CP). This thesis examines several statistical tests for cyclostationarity in OFDM signals that may be used for spectrum sensing in DSA and CR. In particular, focus is placed on statistical tests that rely on estimation of the Cyclic Autocorrelation Function (CAF). Based on splitting the CAF into two complex component functions, several new statistical tests are introduced and are shown to lead to an improvement in detection performance when compared to the existing algorithms. The performance of each new algorithm is assessed in Additive White Gaussian Noise (AWGN), impulsive noise and when subjected to impairments such as multipath fading and Carrier Frequency Offset (CFO). Finally, each algorithm is targeted for Field Programmable Gate Array (FPGA) implementation using a Xilinx 7 series device. In order to keep resource costs to a minimum, it is suggested that the new algorithms are implemented on the FPGA using hardware sharing, and a simple mathematical re-arrangement of certain tests statistics is proposed to circumvent a costly division operation