815 research outputs found

    Towards Multi-Scale Modeling of Carbon Nanotube Transistors

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    Multiscale simulation approaches are needed in order to address scientific and technological questions in the rapidly developing field of carbon nanotube electronics. In this paper, we describe an effort underway to develop a comprehensive capability for multiscale simulation of carbon nanotube electronics. We focus in this paper on one element of that hierarchy, the simulation of ballistic CNTFETs by self-consistently solving the Poisson and Schrodinger equations using the non-equilibrium Greens function (NEGF) formalism. The NEGF transport equation is solved at two levels: i) a semi-empirical atomistic level using the pz orbitals of carbon atoms as the basis, and ii) an atomistic mode space approach, which only treats a few subbands in the tube-circumferential direction while retaining an atomistic grid along the carrier transport direction. Simulation examples show that these approaches describe quantum transport effects in nanotube transistors. The paper concludes with a brief discussion of how these semi-empirical device level simulations can be connected to ab initio, continuum, and circuit level simulations in the multi-scale hierarchy

    Effects of Parasitics and Interface Traps On Ballistic Nanowire FET In The Ultimate Quantum Capacitance Limit

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    In this paper, we focus on the performance of a nanowire Field Effect Transistor (FET) in the Ultimate Quantum Capacitance Limit (UQCL) (where only one subband is occupied) in the presence of interface traps (DitD_{it}), parasitic capacitance (CLC_L) and source/drain series resistance (Rs,dR_{s,d}) using a ballistic transport model and compare the performance with its Classical Capacitance Limit (CCL) counterpart. We discuss four different aspects relevant to the present scenario, namely, (i) gate voltage dependent capacitance, (ii) saturation of the drain current, (iii) the subthreshold slope and (iv) the scaling performance. To gain physical insights into these effects, we also develop a set of semi-analytical equations. The key observations are: (1) A strongly energy-quantized nanowire shows non-monotonic multiple peak C-V characteristics due to discrete contributions from individual subbands; (2) The ballistic drain current saturates better in the UQCL compared to CCL, both in presence and absence of DitD_{it} and Rs,dR_{s,d}; (3) The subthreshold slope does not suffer any relative degradation in the UQCL compared to CCL, even with DitD_{it} and Rs,dR_{s,d}; (4) UQCL scaling outperforms CCL in the ideal condition; (5) UQCL scaling is more immune to Rs,dR_{s,d}, but presence of DitD_{it} and CLC_L significantly degrades scaling advantages in the UQCL.Comment: Accepted at IEEE Transactions on Electron Device

    Graphene Field Effect Transistors: Diffusion-Drift Theory

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    Based on explicit solution of current continuity equation in the graphene FET's channel the semi-classical diffusion-drift description of the carrier transport and I-V characteristics model has been developed. Role of rechargeable defects (interface traps) near or at the interface between graphene and insulated layers has also described.Comment: 24 pages, 13 figures, a chapter in "Graphene, Theory, Research and Applications", INTEC

    Transient Analysis of Warm Electron Injection Programming of Double Gate SONOS Memories by means of Full Band Monte Carlo Simulation

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    In this paper we investigate "Warm Electron Injection" as a mechanism for NOR programming of double-gate SONOS memories through 2D full band Monte Carlo simulations. Warm electron injection is characterized by an applied VDS smaller than 3.15 V, so that electrons cannot easily accumulate a kinetic energy larger than the height of the Si/SiO2 barrier. We perform a time-dependent simulation of the program operation where the local gate current density is computed with a continuum-based method and is adiabatically separated from the 2D full Monte Carlo simulation used for obtaining the electron distribution in the phase space. In this way we are able to compute the time evolution of the charge stored in the nitride and of the threshold voltages corresponding to forward and reverse bias. We show that warm electron injection is a viable option for NOR programming in order to reduce power supply, preserve reliability and CMOS logic level compatibility. In addition, it provides a well localized charge, offering interesting perspectives for multi-level and dual bit operation, even in devices with negligible short channel effects
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