Scalable Approach for Power Droop Reduction During Scan-Based Logic BIST

The generation of significant power droop (PD) during at-speed test performed by Logic Built-In Self Test (LBIST) is a serious concern for modern ICs. In fact, the PD originated during test may delay signal transitions of the circuit under test (CUT): an effect that may be erroneously recognized as delay faults, with consequent erroneous generation of test fails and increase in yield loss. In this paper, we propose a novel scalable approach to reduce the PD during at-speed test of sequential circuits with scan-based LBIST using the launch-on-capture scheme. This is achieved by reducing the activity factor of the CUT, by proper modification of the test vectors generated by the LBIST of sequential ICs. Our scalable solution allows us to reduce PD to a value similar to that occurring during the CUT in field operation, without increasing the number of test vectors required to achieve a target fault coverage (FC). We present a hardware implementation of our approach that requires limited area overhead. Finally, we show that, compared with recent alternative solutions providing a similar PD reduction, our approach enables a significant reduction of the number of test vectors (by more than 50%), thus the test time, to achieve a target FC

An Efficient Algorithm to Selectively Gate Scan Cells for Capture Power Reduction

[[abstract]]Recently, power dissipation in full-scan testing has brought a great challenge for test engineers. In addition to shift power reduction, excessive switching activity during capture operation may lead to circuit malfunction and yield loss. In this paper, a new algorithm is proposed with using clock gating technique on a part of the scan cells to prevent the internal circuit from unnecessary transitions. These scan cells are divided into several exclusive scan groups. For each test vector, only a portion of the scan groups are activated to store the test response per capture cycle. The proposed method can reduce the capture power dissipation without any influence on fault coverage or testing time. Experimental results for ISCAS'89 benchmark circuits show that the capture power reduction in test sequence can up to 55%.[[notice]]補正完畢[[incitationindex]]EI[[booktype]]紙

REDUCING POWER DURING MANUFACTURING TEST USING DIFFERENT ARCHITECTURES

Power during manufacturing test can be several times higher than power consumption in functional mode. Excessive power during test can cause IR drop, over-heating, and early aging of the chips. In this dissertation, three different architectures have been introduced to reduce test power in general cases as well as in certain scenarios, including field test. In the first architecture, scan chains are divided into several segments. Every segment needs a control bit to enable capture in a segment when new faults are detectable on that segment for that pattern. Otherwise, the segment should be disabled to reduce capture power. We group the control bits together into one or more control chains. To address the extra pin(s) required to shift data into the control chain(s) and significant post processing in the first architecture, we explored a second architecture. The second architecture stitches the control bits into the chains they control as EECBs (embedded enable capture bits) in between the segments. This allows an ATPG software tool to automatically generate the appropriate EECB values for each pattern to maintain the fault coverage. This also works in the presence of an on-chip decompressor. The last architecture focuses primarily on the self-test of a device in a 3D stacked IC when an existing FPGA in the stack can be programmed as a tester. We show that the energy expended during test is significantly less than would be required using low power patterns fed by an on-chip decompressor for the same very short scan chains

Matrix/fracture transfer function during counter-current spontaneous imbibition in naturally fractured reservoirs

Naturally fractured reservoirs are abundant in the earth’s crust and host a substantial percentage of oil reserves globally. The main mechanism of oil recovery during waterflooding of these types of reservoirs is through spontaneous imbibition of water into the matrix and simultaneous counter-current flow of oil out of the matrix. Understanding the predominate recovery mechanism enhances reserves estimates, accurate simulation forecasts and overall sound development plans. Dual-porosity and dual-permeability simulations are used in the industry to simulate waterfloods in naturally fractured reservoirs. One of the key parameters in these simulations is the matrix-fracture transfer term, which is not well understood and modeled, especially in mixed-wet reservoirs. The same transfer term is used for primary, secondary and tertiary recovery processes, though it should change depending on the mechanisms of oil recovery. The key mechanism during primary recovery is depressurization, not spontaneous imbibition. The main goal of this research is to develop an accurate representation of the matrix-fracture transfer term in waterflooding for dual-porosity simulators. The analytical and semi-analytical solutions for 1D counter-current imbibition were studied for defining the exact solution in fractured porous media. Fine-grid, single-porosity numerical solutions were developed that are consistent with the 1D analytical solutions, in conjunction with coarse-grid single-porosity conceptual models. Both single-porosity models are used as reference against dual-porosity conceptual models to address the built-in matrix-fracture transfer terms through recovery of the matrix element. The error in simulation was defined as the difference in recoveries between the fine-grid single-porosity solution and the dual-porosity solutions. A detailed investigation of both rock and fluid inputs affecting transfer terms in dual-porosity was made in an effort to match the transient solution obtained from fine-grid single-porosity models. The inclusion of transient effect in dual-porosity requires optimizing the following inputs which are shape factor, capillary exponent and oil relative permeability exponent. Two main processes were proposed for optimization. Firstly, an accuracy-based Latin Hyper Cube sampling method was utilized that converged to the solution quickly. Secondly, utilizing a machine learning algorithm (specifically an Artificial Neural Net model) that predicts recovery accuracy based on the aforementioned chosen inputs. The machine learning model needed many iterations to converge to a solution.Petroleum and Geosystems Engineerin

Metal-Organic Frameworks in Germany: from Synthesis to Function

Metal-organic frameworks (MOFs) are constructed from a combination of inorganic and organic units to produce materials which display high porosity, among other unique and exciting properties. MOFs have shown promise in many wide-ranging applications, such as catalysis and gas separations. In this review, we highlight MOF research conducted by Germany-based research groups. Specifically, we feature approaches for the synthesis of new MOFs, high-throughput MOF production, advanced characterization methods and examples of advanced functions and properties