Advanced manned space flight simulation and training: An investigation of simulation host computer system concepts

The findings of a preliminary investigation by Southwest Research Institute (SwRI) in simulation host computer concepts is presented. It is designed to aid NASA in evaluating simulation technologies for use in spaceflight training. The focus of the investigation is on the next generation of space simulation systems that will be utilized in training personnel for Space Station Freedom operations. SwRI concludes that NASA should pursue a distributed simulation host computer system architecture for the Space Station Training Facility (SSTF) rather than a centralized mainframe based arrangement. A distributed system offers many advantages and is seen by SwRI as the only architecture that will allow NASA to achieve established functional goals and operational objectives over the life of the Space Station Freedom program. Several distributed, parallel computing systems are available today that offer real-time capabilities for time critical, man-in-the-loop simulation. These systems are flexible in terms of connectivity and configurability, and are easily scaled to meet increasing demands for more computing power

parMERASA Multi-Core Execution of Parallelised Hard Real-Time Applications Supporting Analysability

International audienceEngineers who design hard real-time embedded systems express a need for several times the performance available today while keeping safety as major criterion. A breakthrough in performance is expected by parallelizing hard real-time applications and running them on an embedded multi-core processor, which enables combining the requirements for high-performance with timing-predictable execution. parMERASA will provide a timing analyzable system of parallel hard real-time applications running on a scalable multicore processor. parMERASA goes one step beyond mixed criticality demands: It targets future complex control algorithms by parallelizing hard real-time programs to run on predictable multi-/many-core processors. We aim to achieve a breakthrough in techniques for parallelization of industrial hard real-time programs, provide hard real-time support in system software, WCET analysis and verification tools for multi-cores, and techniques for predictable multi-core designs with up to 64 cores

SESAR and SANDRA: A Co-Operative Approach for Future Aeronautical Communications

Optical physic

A Blue Print for the Future Electronic Warfare Suite Development

Mastering increasing complexity of electronic warfare (EW) airborne equipment systems needs new architectural concepts mainly based on modular design, generic resources and reliable communication buses. Less is more architectural concept replaces separate EW line replaceable units with fewer centralized processing units. This approach leads to a robust architecture for the next generation EW suite development in a unified fashion and thereby promising significant weight reduction and maintenance savings. In general, this approach is represented by a blanket term called integrated modular avionics (IMA). IMA architecture based EW suite development concentrates with the main goals of IMA such as technology transparency, resource sharing, incremental qualification, reduced maintenance cost, and so on.Defence Science Journal, 2013, 63(2), pp.192-197, DOI:http://dx.doi.org/10.14429/dsj.63.426

From ARTEMIS Requirements to a Cross-Domain Embedded System Architecture

International audienceThis paper gives an overview of the cross-domain component-based architecture GENESYS for embedded systems. The development of this architecture has been driven by key industrial challenges identified within the ARTEMIS Strategic Research Agenda (SRA) such as composability, robustness and integrated resource management. GENESYS is a platform architecture that provides a minimal set of core services and a plurality of optional services that are predominantly implemented as self-contained system components. Choosing a suitable set of these system components that implement optional services, augmented by application specific components, can generate domain-specific instantiations of the architecture (e.g., for automotive, avionic, industrial control, mobile, and consumer electronics applications). Such a cross-domain approach is needed to support the coming Internet of Things, to take full advantage of the economies of scale of the semiconductor industry and to improve productivity