Neuromorphic Character Recognition System With Two PCMO Memristors as a Synapse

Using memristor devices as synaptic connections has been suggested with different neural architectures in the literature. Most of the published works focus on simulating some plasticity mechanism for changing memristor conductance. This paper presents a neural architecture of a character recognition neural system using Al/Pr0.7Ca0.3MnO3 (PCMO) memristors. The PCMO memristor has an inhomogeneous barrier at the aluminum and PCMO interface which gives rise to an asymmetrical behavior when moving from high resistance to low resistance and vice versa. This paper details the design and simulations for solving this asymmetrical memristor behavior. Also, a general memory read/write framework is used to describe the running and plasticity of neural systems. The proposed neural system can be produced in hardware using a small 1 K crossbar memristor grid and CMOS neural nodes as presented in the simulation results.X111917Ysciescopu

Neuro-memristive Circuits for Edge Computing: A review

The volume, veracity, variability, and velocity of data produced from the ever-increasing network of sensors connected to Internet pose challenges for power management, scalability, and sustainability of cloud computing infrastructure. Increasing the data processing capability of edge computing devices at lower power requirements can reduce several overheads for cloud computing solutions. This paper provides the review of neuromorphic CMOS-memristive architectures that can be integrated into edge computing devices. We discuss why the neuromorphic architectures are useful for edge devices and show the advantages, drawbacks and open problems in the field of neuro-memristive circuits for edge computing

Memristor devices based on low-bandwidth manganites

This dissertation investigates the phenomenon of resistive switching (RS) in lowbandwidth mixed-valence perovskite manganite oxides. In particular, the compounds Pr0.6Ca0.4MnO3 and Gd1−xCaxMnO3 with x between 0 and 1 are studied. The steps of sample fabrication, crystalline properties and measurements to verify the quality of the devices are also reported. The thin film memristor devices were fabricated from target pellets using pulsed laser deposition on single crystal SrTiO3 substrates. The crystallinity was verified using X-ray diffraction and the elemental composition by energy dispersive X-ray spectroscopy. The fabricated thin films were used to create memristor devices by depositing patterned metal electrodes on them by either DC magnetron sputtering or e-beam physical vapor deposition. When the studied materials were combined with a reactive electrode material, the formed interface exhibited the phenomenon of resistive switching, where the resistance of the device can be modified non-volatilely by application of electric field to the terminals of the device. The noble metals Au and Ag were found to be optimal for the passive interfaces, and Al as the active interface. The RS properties of the devices made with the optimal electrode configuration were studied in detail. The devices were found to have asymmetric bipolar RS with promising characteristics. The studies encompassed varying the calcium doping of the samples, studying the endurance and timing characteristics of the RS phenomenon as well as measuring the device characteristics as a function of temperature. The RS properties were found to vary significantly over the calcium doping range. When the measurement results were used in a conduction model analysis, the switching properties were found to be correlated with the trap-energy level of the Al/GCMOinterface region. Lastly, the GCMO memristor devices were modeled successfully using a compact model compatible with circuit simulators and the biologicallyinspired spike-timing-dependent plasticity learning rule was demonstrated. In conclusion, GCMO is a promising new material for RS-based neuromorphic applications due to its stable switching properties. The unexpected differences between GCMO and PCMO show that there are still many unexplored RS properties and behaviors within the manganite family that can be explored in future research

Design of Robust Memristor-Based Neuromorphic Circuits and Systems with Online Learning

Computing systems that are capable of performing human-like cognitive tasks have been an area of active research in the recent past. However, due to the bottleneck faced by the traditionally adopted von Neumann computing architecture, bio-inspired neural network style computing paradigm has seen a spike in research interest. Physical implementations of this paradigm of computing are known as neuromorphic systems. In the recent years, in the domain of neuromorphic systems, memristor based neuromorphic systems have gained increased attention from the research community due to the advantages offered by memristors such as their nanoscale size, nonvolatile nature and power efficient programming capability. However, these devices also suffer from a variety of non-ideal behaviors such as switching speed and threshold asymmetry, limited resolution and endurance that can have a detrimental impact on the operation of the systems employing these devices. This work aims to develop device-aware circuits that are robust in the face of such non-ideal properties. A bi-memristor synapse is first presented whose spike-timing-dependent plasticity (STDP) behavior can be precisely controlled on-chip and hence is shown to be robust. Later, a mixed-mode neuron is introduced that is amenable for use in conjunction with a range of memristors without needing to custom design it. These circuits are then used together to construct a memristive crossbar based system with supervised STDP learning to perform a pattern recognition application. The learning in the crossbar system is shown to be robust to the device-level issues owing to the robustness of the proposed circuits. Lastly, the proposed circuits are applied to build a liquid state machine based reservoir computing system. The reservoir used here is a spiking recurrent neural network generated using an evolutionary optimization algorithm and the readout layer is built with the crossbar system presented earlier, with STDP based online learning. A generalized framework for the hardware implementation of this system is proposed and it is shown that this liquid state machine is robust against device-level switching issues that would have otherwise impacted learning in the readout layer. Thereby, it is demonstrated that the proposed circuits along with their learning techniques can be used to build robust memristor-based neuromorphic systems with online learning

Analog Spiking Neuromorphic Circuits and Systems for Brain- and Nanotechnology-Inspired Cognitive Computing

Human society is now facing grand challenges to satisfy the growing demand for computing power, at the same time, sustain energy consumption. By the end of CMOS technology scaling, innovations are required to tackle the challenges in a radically different way. Inspired by the emerging understanding of the computing occurring in a brain and nanotechnology-enabled biological plausible synaptic plasticity, neuromorphic computing architectures are being investigated. Such a neuromorphic chip that combines CMOS analog spiking neurons and nanoscale resistive random-access memory (RRAM) using as electronics synapses can provide massive neural network parallelism, high density and online learning capability, and hence, paves the path towards a promising solution to future energy-efficient real-time computing systems. However, existing silicon neuron approaches are designed to faithfully reproduce biological neuron dynamics, and hence they are incompatible with the RRAM synapses, or require extensive peripheral circuitry to modulate a synapse, and are thus deficient in learning capability. As a result, they eliminate most of the density advantages gained by the adoption of nanoscale devices, and fail to realize a functional computing system. This dissertation describes novel hardware architectures and neuron circuit designs that synergistically assemble the fundamental and significant elements for brain-inspired computing. Versatile CMOS spiking neurons that combine integrate-and-fire, passive dense RRAM synapses drive capability, dynamic biasing for adaptive power consumption, in situ spike-timing dependent plasticity (STDP) and competitive learning in compact integrated circuit modules are presented. Real-world pattern learning and recognition tasks using the proposed architecture were demonstrated with circuit-level simulations. A test chip was implemented and fabricated to verify the proposed CMOS neuron and hardware architecture, and the subsequent chip measurement results successfully proved the idea. The work described in this dissertation realizes a key building block for large-scale integration of spiking neural network hardware, and then, serves as a step-stone for the building of next-generation energy-efficient brain-inspired cognitive computing systems