1,002 research outputs found

    Delay Measurements and Self Characterisation on FPGAs

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    This thesis examines new timing measurement methods for self delay characterisation of Field-Programmable Gate Arrays (FPGAs) components and delay measurement of complex circuits on FPGAs. Two novel measurement techniques based on analysis of a circuit's output failure rate and transition probability is proposed for accurate, precise and efficient measurement of propagation delays. The transition probability based method is especially attractive, since it requires no modifications in the circuit-under-test and requires little hardware resources, making it an ideal method for physical delay analysis of FPGA circuits. The relentless advancements in process technology has led to smaller and denser transistors in integrated circuits. While FPGA users benefit from this in terms of increased hardware resources for more complex designs, the actual productivity with FPGA in terms of timing performance (operating frequency, latency and throughput) has lagged behind the potential improvements from the improved technology due to delay variability in FPGA components and the inaccuracy of timing models used in FPGA timing analysis. The ability to measure delay of any arbitrary circuit on FPGA offers many opportunities for on-chip characterisation and physical timing analysis, allowing delay variability to be accurately tracked and variation-aware optimisations to be developed, reducing the productivity gap observed in today's FPGA designs. The measurement techniques are developed into complete self measurement and characterisation platforms in this thesis, demonstrating their practical uses in actual FPGA hardware for cross-chip delay characterisation and accurate delay measurement of both complex combinatorial and sequential circuits, further reinforcing their positions in solving the delay variability problem in FPGAs

    Design of surface acoustic wave filters and applications in future communication systems

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    Fault simulation for structural testing of analogue integrated circuits

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    In this thesis the ANTICS analogue fault simulation software is described which provides a statistical approach to fault simulation for accurate analogue IC test evaluation. The traditional figure of fault coverage is replaced by the average probability of fault detection. This is later refined by considering the probability of fault occurrence to generate a more realistic, weighted test metric. Two techniques to reduce the fault simulation time are described, both of which show large reductions in simulation time with little loss of accuracy. The final section of the thesis presents an accurate comparison of three test techniques and an evaluation of dynamic supply current monitoring. An increase in fault detection for dynamic supply current monitoring is obtained by removing the DC component of the supply current prior to measurement

    Modelling and detection of faults in axial-flux permanent magnet machines

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    The development of various topologies and configurations of axial-flux permanent magnet machine has spurred its use for electromechanical energy conversion in several applications. As it becomes increasingly deployed, effective condition monitoring built on reliable and accurate fault detection techniques is needed to ensure its engineering integrity. Unlike induction machine which has been rigorously investigated for faults, axial-flux permanent magnet machine has not. Thus in this thesis, axial-flux permanent magnet machine is investigated under faulty conditions. Common faults associated with it namely; static eccentricity and interturn short circuit are modelled, and detection techniques are established. The modelling forms a basis for; developing a platform for precise fault replication on a developed experimental test-rig, predicting and analysing fault signatures using both finite element analysis and experimental analysis. In the detection, the motor current signature analysis, vibration analysis and electrical impedance spectroscopy are applied. Attention is paid to fault-feature extraction and fault discrimination. Using both frequency and time-frequency techniques, features are tracked in the line current under steady-state and transient conditions respectively. Results obtained provide rich information on the pattern of fault harmonics. Parametric spectral estimation is also explored as an alternative to the Fourier transform in the steady-state analysis of faulty conditions. It is found to be as effective as the Fourier transform and more amenable to short signal-measurement duration. Vibration analysis is applied in the detection of eccentricities; its efficacy in fault detection is hinged on proper determination of vibratory frequencies and quantification of corresponding tones. This is achieved using analytical formulations and signal processing techniques. Furthermore, the developed fault model is used to assess the influence of cogging torque minimization techniques and rotor topologies in axial-flux permanent magnet machine on current signal in the presence of static eccentricity. The double-sided topology is found to be tolerant to the presence of static eccentricity unlike the single-sided topology due to the opposing effect of the resulting asymmetrical properties of the airgap. The cogging torque minimization techniques do not impair on the established fault detection technique in the single-sided topology. By applying electrical broadband impedance spectroscopy, interturn faults are diagnosed; a high frequency winding model is developed to analyse the impedance-frequency response obtained

    VLSI neural networks for computer vision

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    An extended induction motor model for investigation of faulted machines and fault tolerant variable speed drives

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    High performance variable speed induction motor drives have been commercially available for industrial applications for many years. More recently they have been proposed for applications such as hybrid automotive drives, and some pump applications on more electric aircraft. These applications will require the drive to operate in the presence of faults i.e. they must be “Fault Tolerant” and be capable of “Fault Ride Through”. The aim of this project was therefore to investigate fault ride through control strategies for induction motor drives, particularly with respect to open circuit winding or power converter faults. Three objectives were identified and addressed to meet this aim. a) A new simulation model for an induction motor was created which reflects both saturation and space harmonics effects within the drive under both symmetric (healthy) and asymmetric (faulted) conditions. The model has a relatively low computational requirement to allow it to be used in conjunction with the simulation of high performance control algorithms and power electronic equipment. For operation in both healthy and faulty conditions, comparisons show that the simulated saturation and space harmonic effects match those obtained from an experiment system. Therefore this model is a very useful tool for the development and optimisation of new control strategies for fault tolerant drive systems. b) A novel on-line fault detection and diagnosis algorithm based on the measurement of the third harmonic component in the motor line currents has been proposed. The location of the open circuit fault is detected based on detecting a magnitude reduction for the third harmonic component of the current flowing to the motor terminals, and can be implemented in real time to give a fast response with little additional computational overhead. c) A new open circuit fault tolerant control strategy has been designed for a delta connected induction machine suddenly affected by an open circuit winding fault. The fault ride through is achieved without any modification to either the power converter or the motor circuit. A novel feedforward compensation algorithm is introduced which considerably reduces the current and the torque ripple in the faulted drive motor. Two methods for controlling the neutral point voltage are also presented so that the available voltage capacity of the inverter is maximised in both normal and fault mode. For high speed operation, two different methods for field weakening control are presented, so that the available voltage capacity is maximized in both normal and fault mode. This thesis describes the theoretical derivation of the new models and algorithms, and presents experimental results from a 4kW laboratory prototype to validate the proposals. The full fault tolerant system is experimentally demonstrated on a delta connected machine which suffers an open circuit winding fault. The improved motor performance under fault conditions is clearly seen
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