856 research outputs found

    A Study on the Noise Threshold of Fault-tolerant Quantum Error Correction

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    Quantum circuits implementing fault-tolerant quantum error correction (QEC) for the three qubit bit-flip code and five-qubit code are studied. To describe the effect of noise, we apply a model based on a generalized effective Hamiltonian where the system-environment interactions are taken into account by including stochastic fluctuating terms in the system Hamiltonian. This noise model enables us to investigate the effect of noise in quantum circuits under realistic device conditions and avoid strong assumptions such as maximal parallelism and weak storage errors. Noise thresholds of the QEC codes are calculated. In addition, the effects of imprecision in projective measurements, collective bath, fault-tolerant repetition protocols, and level of parallelism in circuit constructions on the threshold values are also studied with emphasis on determining the optimal design for the fault-tolerant QEC circuit. These results provide insights into the fault-tolerant QEC process as well as useful information for designing the optimal fault-tolerant QEC circuit for particular physical implementation of quantum computer.Comment: 9 pages, 9 figures; to be submitted to Phys. Rev.

    Optimized Surface Code Communication in Superconducting Quantum Computers

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    Quantum computing (QC) is at the cusp of a revolution. Machines with 100 quantum bits (qubits) are anticipated to be operational by 2020 [googlemachine,gambetta2015building], and several-hundred-qubit machines are around the corner. Machines of this scale have the capacity to demonstrate quantum supremacy, the tipping point where QC is faster than the fastest classical alternative for a particular problem. Because error correction techniques will be central to QC and will be the most expensive component of quantum computation, choosing the lowest-overhead error correction scheme is critical to overall QC success. This paper evaluates two established quantum error correction codes---planar and double-defect surface codes---using a set of compilation, scheduling and network simulation tools. In considering scalable methods for optimizing both codes, we do so in the context of a full microarchitectural and compiler analysis. Contrary to previous predictions, we find that the simpler planar codes are sometimes more favorable for implementation on superconducting quantum computers, especially under conditions of high communication congestion.Comment: 14 pages, 9 figures, The 50th Annual IEEE/ACM International Symposium on Microarchitectur
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