3-5족 화합물 반도체의 웨이퍼 접합과 에피택셜 리프트 오프를 통한 다중 파장 광 검출기

학위논문 (박사)-- 서울대학교 대학원 : 공과대학 재료공학부, 2019. 2. 윤의준.Group III-V compound semiconductors, having a band gap from ultraviolet to infrared regions, have been widely used as imagers to visualize a single band. With the recent arrival of the Internet-of-things (IOTs) era, new applications such as time of flight (TOF) sensors, normalized difference vegetation index (NVDI) and night vision systems have gained interest. Therefore, the importance of multicolor photodetectors is raised. To implement multicolor photodetectors, an epitaxy method has been commonly used with III-V compound semiconductors. For example, quantum wells, quantum dots and type-II based structures and metamorphically grown bulk heteroepitaxial structures have been employed. Although an epitaxy method seems to be quite simple, there are several problems including limitation of material choice due to the discrepancy of lattice constants between thin films and substrates, performance degradation originated from internal defects and complexity of growth. Therefore, to avoid these disadvantages of the epitaxy method, a heterogeneous integration method has been an alternative because the integration of devices grown on different substrates is possible. Thus, it has been considered to be a promising method to combine photodetectors with simple bulk structures. However, although there is a significant advantage to the heterogeneous integration method, current multicolor photodetectors have exhibited limitations regarding pixel density and vertical misalignment due to problems related to conventional integration methods. Therefore, in this thesis, the heterogeneous integration of III-V compound semiconductors was investigated for fabricating multicolor photodetectors with high pixel density and highly accurate alignment. Firstly, a research on heterogeneous integration of GaAs based thin film devices with other substrates was carried out. We studied wafer bonding and epitaxial lift off process which have advantages including large area transferability, cost-effectiveness and high quality of layers compared with wafer splitting and transfer printing methods. To fabricate multicolor photodetectors on single substrates, a stable rigid-to-rigid heterogeneous integration method is highly required. However, there have only been few reports regarding rigid-to-rigid transfer by using epitaxial lift off due to the difficulty involving byproducts and gas bubbles generated during the wet etching of the sacrificial layer for wafer separation. This has been a hindrance compared with thin film on flexible substrates which can accelerate wafer separation by using strain and external equipment. In order to overcome this problem, high throughput epitaxial lift off process was proposed through a pre-patterning process and surface hydrophilization. The pre-patterning process can maximize the etching area of the AlAs sacrificial layer and rapidly remove bubbles. In addition, acetone, which is a hydrophilic solution, was mixed with hydrofluoric acid in order to reduce the surface contact angle and viscosity. It resulted in an effective penetration of the etching solution and the suppression of byproducts. Consequently, it was possible to transfer GaAs thin films on rigid substrates within 30 minutes for a 2 inch wafer which has been the fastest compared with previous reports. Also, using this template, electronic and optoelectronic devices were successfully fabricated and operated. Secondly, we have studied to overcome restrictions of bulk photodetector for InSb binary material including the detection limit and cryogenic operation. To extend the detection limit of bulk InSb toward the LWIR range, the ideal candidate of III-V bulk materials is indium arsenide antimonide (InAsSb) material due to its corresponding band gaps ranging from SWIR to LWIR. By combining bulk InAsSb with other bulk materials with previously developed integration methods, we could ultimately fabricate a multicolor photodetector ranging from ultraviolet to LWIR with only bulk structures. Thus, in order to verify the viability of this material, a p-i-n structure based photodetector with an InAs0.81Sb0.19 absorption layer was grown on a GaAs substrate. To enhance an ability to be operated at a high temperature, an optimum InAlSb barrier layer was designed by technology computer aided design (TCAD). Also, InAsSb/InAlSb heterojunction photodetector was grown by molecular beam epitaxy (MBE). As a result, we have demonstrated the first room temperature operation of heterojunction photodetectors in MWIR range among InAsSb photodetectors with similar Sb compositions. Additionally, it has a higher responsivity of 15 mA/W compared with commercialized photodetectors. This MWIR photodetector with room temperature operability could help the reduction of the volume for final detector systems due to the elimination of Dewar used in InSb photodetectors. In other words, from this experiments, it is suggested that there is a strong potential of InAsSb bulk structures for detecting LWIR. Finally, the study on the monolithic integration was carried out to verify the feasibility of multicolor photodetectors by integration of bulk structures. Among procured photodetectors with detection ranging from visible to MWIR at room temperature operation, visible GaAs and near-infrared InGaAs photodetector were used for establishing the optimized fabrication process due to materials process maturity. By using previously developed high throughput ELO process, GaAs photodetectors were transferred onto InGaAs photodetectors to form visible/near-infrared multicolor photodetectors. It was found that top GaAs PD and bottom InGaAs PD were vertically well aligned without an off-axis tilt in x-ray diffraction (XRD) measurement. Also, similar dark currents of each photodetector were observed compared with reference photodetectors. Finally, with incidence of laser illumination, photoresponses were clearly revealed in visible band and near-infrared band of material characteristics, respectively. These results suggested high throughput ELO process enables the monolithic integration of bulk based multicolor photodetectors on a single substrate with high pixel density and nearly perfect vertical alignment. In the future, depending on the target applications, photodetectors with desired wavelengths could be simply grown as bulk structures and fabricated for multicolor imagers.자외선부터 적외선 영역의 밴드갭을 가진 3-5족 화합물 반도체는 단일 파장대역을 시각화하는 imager 로 널리 사용되고 있다. 그러나, 최근 사물인터넷 시대가 도래함에 따라, time of flight (TOF) 센서, 식생지수 측정, night vision 등의 새로운 응용처가 증가하고 있다. 따라서 기존의 단일파장 광 검출기가 아닌, 다중파장 광 검출기의 중요성이 증대되고 있으며, 이런 다중파장 광 검출기를 구현하기 위해서 3-5족을 화합물 반도체의 epitaxy 방법이 흔히 사용되어 왔다. 예를 들어, 다른 격자 상수를 가진 벌크 구조를 metamorphic 성장법을 이용하여 성장하거나, 또는 양자우물, 양자점 그리고 type-II 기반의 구조가 적용되어야만 했다. Epitaxy 방법은 매우 간단한 방법처럼 보이지만, 기판과 성장하려는 물질간의 격자상수의 차이로 인해 제한되는 물질 선택, 내부 결함에 의한 성능감소 그리고 성장의 복잡함 등 여러 문제가 존재한다. 그래서, epitaxy 방법의 단점들을 회피하기 위하여, 다른 기판에서 성장된 소자의 집적을 가능하게 할 수 있는, 이종 집적 방법이 대안이 되어왔다. 이를 이용하면, 간단한 벌크 구조의 광 검출기를 결합할 수 있기 때문에 매우 유망한 방법으로 여겨지고 있다. 그러나, 이종 집적 방법의 뛰어난 장점에도 불구하고, 현재의 다중파장 광 검출기는 집적 방법의 문제로 수직 정렬 오차 및 픽셀 밀도 측면에서 한계점을 보여주었다. 따라서, 본 논문에서는 고밀도/ 고정렬된 다중파장 광 검출기 제작을 위한 3-5족 기반의 화합물 반도체의 이종 집적 방법에 대한 연구를 진행하였다. 먼저, 3-5족 GaAs 기반의 박막소자를 다른 기판과 이종 집적하는 연구를 수행하였다. 기존의 wafer splitting 과 transfer printing 방법과 비교했을 때 대면적 전사, 저렴한 가격 그리고 고품질 layer등 장점들이 있는 웨이퍼 접합과 에피택셜 리프트 오프 (epitaxial lift off) 방법에 대해서 연구를 하였다. 단일 기판상에 다중파장 광 검출기를 제작하기 위해서는, rigid-to-rigid 이종 집적 방법이 반드시 필요하다. 그러나, strain 과 외부 장치를 이용하여 기판 분리를 가속화 시킬 수 있는 유연기판 상의 박막전사와 달리, 습식 식각 시 생성되는 부산물들과 가스 기포들 때문에 에피택셜 리프트 오프 방법을 이용한 rigid-to-rigid 전사에 대해서는 매우 적은 결과만이 보고되었다. 이런 문제를 극복하기 위해서, pre-patterning 과정과 표면 친수화를 통한 고속 에피택셜 리프트 오프를 제안하였다. 이 pre-patterning 과정은 AlAs 희생층의 식각 영역을 극대화 시킬 수 있으며, 기포를 빠르게 제거할 수 있다. 그리고, 친수성 용액인 아세톤을 불산과 섞어주면 점도와 표면 접촉 각을 줄일 수 있다. 이것은 식각 용액의 효과적인 침투와 부산물을 억제시키는 결과를 보였다. 결과적으로, 2 인치 크기의GaAs 기반 박막들을 rigid 기판상에 30분 이내로 전사가 가능했으며 이는 기존의 보고들과 비교했을 때 가장 빠른 결과이다. 또한 이 템플릿을 이용하여 광/전자 소자를 성공적으로 제작 및 동작시켰다. 두 번째로, 기존의 InSb 물질을 이용한 벌크 구조의 광 검출기가 가진 파장한계 그리고 저온동작 등의 제약들을 극복하기 위한 연구를 진행하였다. 벌크 구조의 파장 한계를 원적외선 대역까지 늘이기 위한, 3-5족 물질 중 이상적인 물질은 인듐 아세나이드 안티모나이드 (indium arsenide antimonide) 이다. 왜냐하면 InAsxSb1-x는 SWIR 부터 LWIR 의 해당하는 밴드 갭을 가지고 있기 때문이다. 이 물질 기반의 구조와 개발된 공정을 사용하면, 우리는 궁극적으로 자외선부터 원적외선까지의 영역을 벌크 구조만을 사용하여 다중파장 광 검출기를 구현할 수 있게 된다. 따라서, 이 물질의 가능성을 검증하기 위해서, InAs0.81Sb0.19 의 흡수층을 가진 p-i-n 구조 기반의 광 검출기를 GaAs 기판상에서 성장하였다. 고온에서 동작 특성을 향상시키기 위하여, 최적의 InAlSb 배리어를 TCAD로 디자인하였다. 이러한, InAsSb/InAlSb 이종 접합 광 검출기는 분자선 증착 장비를 이용하여 성장되었다. 그 결과로, 우리는 비슷한 Sb 조성을 가진 InAsSb 기반의 광 검출기들 중에서, 처음으로 중적외선 대역의 이종 접합 구조의 광 검출기를 상온 동작 하는 것을 시연하였다. 게다가, 그것은 상용화 된 광 검출기보다 높은 광 응답 특성(15 mA/W)을 보여주었다. 이 상온에서 동작하는 중적외선 광 검출기는 InSb 광 검출기에 사용되는 Dewar 를 제거함으로써, 최종 검출기 시스템의 부피를 감소 시킬 수 있다. 이 실험으로부터, 벌크 구조로 원적외선 대역을 검출하기 위한 InAsSb 물질의 큰 잠재성이 있다는 것을 의미한다. 마지막으로, 벌크 구조의 집적을 통한 다중파장 광 검출기의 실현이 가능한지 확인하기 위해서 모놀리식(monolithic) 집적에 관한 연구를 수행하였다. 확보된 상온 동작이 가능한 가시광선부터 MWIR 검출 파장을 가진 광 검출기들 중에서, 최적의 제작 순서를 확립하기 위해서 물질에 관한 성숙도가 높은 가시광선 GaAs 그리고 근적외선 InGaAs 광 검출기를 사용하였다. 가시광/근적외선 대역의 다중파장 광 검출기를 형성하기 위해서, GaAs 광 검출기를 InGaAs 광 검출기 상으로 개발된 고속 에피택셜 리프트 오프 기법을 사용하여 전사하였다. GaAs 광 검출기와 InGaAs 광 검출기는 off-axis 없이 수직으로 잘 정렬되었음을 x-ray 분광법을 이용하여 확인하였다. 또한, 각각의 광 검출기의 기준 소자들과 비교했을 때 비슷한 암 전류가 나타났다. 마지막으로, 레이저 입사를 통해, 두 개의 광 검출기 대한 광 반응은 물질 특성들에 따라 가시광과 근적외선에서 각각 명확하게 나타났다. 이러한 결과들은 고속 에피택셜 리프트 오프 기법이 높은 픽셀 밀도 및 거의 완벽한 수직 정렬도를 갖는 한 기판상의 벌크 기반의 다중파장 광 검출기를 집적할 수 있다는 것을 의미한다. 미래의 목표하는 응용처에 따라, 원하는 파장들을 갖는 광 검출기를 벌크 구조로 간단하게 성장할 수 있고, 다중파장 이미징 시스템을 제작 할 수 있다.List of Figures i Chapter.1 Introduction 1 1.1 Photodetectors based on III-V compound semiconductors 1 1.2 Imaging applications 4 1.2.1. Single color imaing 4 1.2.2. Multicolor imaing 4 1.2.3. Development trend of photodetectors 5 1.3 Approches for forming multicolor photodectors 9 1.3.1. Epitaxy 9 1.3.2. Heterogeneous integration 17 1.3.3. Summary of each method 21 1.4 Overview of heterogeneous integration technology 23 1.4.1. Introduction 23 1.4.2. Direct bonding 24 1.4.3. Cold-weld bonding 26 1.4.4. Eutectic bonding 26 1.4.5. Adhesive bonding 28 1.4.7. Wafer splitting 31 1.4.8. Epitaxial lift off (ELO) 33 1.4.9. Benchmark of differenct heterogeneous intergration methods 35 1.5 Thesis overview 37 1.6 Bibliography 40 Chapter. 2 Method for heterogeneous integration of III-V compound semiconductors on other substrates 45 2.1 Introduction 45 2.1.1 The origin of low throughput in conventional ELO 46 2.1.2 Previous works for ehancement of ELO throughput 48 2.1.3 Approach: high-throughput ELO process 53 2.1.4 Experimental procedure 55 2.2 Results and discussion 57 2.3 Summary 65 2.4 Biblography 66 Chapter. 3 Verification of thin film devices by using a high throughput heterogeneous integration method 70 3.1 Introduction 70 3.2 Growth of device structures and heterogeneous integration 72 3.2.1. Device structures 72 3.2.2. Wafer bonding and ELO 74 3.3 Y2O3 bonded HEMTs on Si substrate 75 3.3.1 Fabrication process 75 3.3.2. Material characterization of HEMTs on Si 76 3.3.3. Electrical characterization of HEMTs on Si 80 3.3.4. Investigation of wafer reusability by using HEMT structure 83 3.4 Pt/Au bonded optoelectonic devices 86 3.4.1. Fabrication process of solar cells and HPTs on Si 86 3.4.2. Evaluation of Pt/Au metal bonding 88 3.4.3. Characterization of solar cells and HPTs 91 3.5 Estimation of production cost via recycling III-V wafers 95 3.6 Summary 101 3.7 Bibliography 102 Chapter. 4 Design and characterization of III-V based photodtectors 106 4.1 Introduction 106 4.1.1. The potential of Induim arsenide antimonide (InAsSb) 106 4.1.2. Challenges of InAsSb p-i-n PDs for compact detector systems 110 4.2 Barrier layer design and material characterization for growing HJPDs 113 4.2.1. Simulation of an optimum barrier layer for InAs0.8Sb0.2 113 4.2.2. Growth of a high quality InAsSb layer with an AlGaSb buffer layer grown on GaAs substrates 115 4.2.3. Ohmic contact formation with metal species 120 4.2.4. Growth and fabrication of InAsSb based HJPDs 126 4.3 Analysis of electrical and optical characteristics for fabricated PDs 129 4.4 Summary 138 4.5 Bibliography 139 Chapter. 5 Monolithic integration of visible/near-infrared photodetectors 145 5.1 Introduction 145 5.2 Fabrication process and material characterization of multicolor PD 148 5.3 Analysis of the electrical and optical characteristics of the fabricated multicolor PDs 154 5.4 Summary 163 5.5 Bibliography 164 Chapter. 6 Conclusions 169 국 문 초 록 172Docto

MOCVD Growth and Electrical Characterization of AlInGaN Heterojunctions

III-N-based electronics and optoelectronics are reaching great levels of sophistication in the areas of power electronics, RF amplifiers, lighting, and display technologies. Much of the success of these technologies can be traced to superior or unique material properties that make III-N solid state devices the ideal choices for their applications. Consequently, state of the art devices are being pushed to the limit of what may be fabricated due to strain considerations in the AlGaN and InGaN systems. In order to continue the advancement of III-N based technologies toward greater performance, into new niches, and open up new markets, it is necessary to exploit the entire (Al,In,Ga)N system to its fullest potential.The utility of AlInGaN is multifaceted. These materials can be used for strain management, fabrication of lattice-matched devices, and polarization engineering to manipulate electric fields within device active regions, or even create high-conductivity charge slabs. Unlike ternary alloys, there is no single unique combination of band gap, polarization charge, and lattice constant, which results in greater device design freedom. However, to effectively utilize these materials, reliable growth processes must be established, and the material parameters critical to device design must be characterized.This thesis describes the progress in AlInGaN development at UCSB beginning with identification and exploration of the AlInGaN growth parameter space, using understanding from ternary alloys as a springboard into quaternary growth. From there, the thesis progresses to the establishment of a design toolbox for AlInGaN based devices via electrical characterization of these materials. Challenges associated with the AlInGaN system, coupled with sparse literature on the topic, necessitated the design of experiments to isolate and characterize the material parameters from measurements of solid-state devices. Electrical characterization focused on the net polarization charge at heterojunction interfaces, as well as the effects of Schottky barrier height inhomogeneity on both electrostatics and transport in diodes. The quantum mechanical scattering at the metal-semiconductor junction will be discussed, as will its physical origin and impact on diode current. A major goal of this thesis was to establish a device design toolbox populated with information of experimentally calculated net polarization charge at AlInGaN/GaN interfaces and Schottky barrier heights. This goal was accomplished and the information was established for future device designers in the field.The thesis concludes with a discussion of the application and exploitation of the unique effects observed in AlInGaN materials to device design. Future outlook will be given on avenues for research in AlInGaN materials and AlInGaN-based devices, and direction will be provided to finish populating the (electrical) device design toolbox with conduction band offset measurements

AlGaN/GaN 전력소자의 특성 향상을 위한 식각과 절연막에 관한 연구

학위논문 (박사) -- 서울대학교 대학원 : 공과대학 전기·정보공학부, 2020. 8. 서광석.최근 에너지 위기와 환경규제 강화, 친환경 녹색성장 등의 이슈가 대두되어 에너지 절감과 환경 보호 분야에 IT 기술을 접목, 활용하는 그린 IT 패러다임이 부각되고 있다. 현재 고유가 환경규제 강화에 대응하기 위해 하이브리드 자동차, 전기자동차 등 친환경 미래형 자동차 개발이 요구되고 있으며, 자동차에서 전장부품이 차지하는 원가비중은 약 40%까지 달할 것으로 전망되고 이 중 반도체가 차지하는 비용은 약 30% 정도로 추정된다. 이러한 자동차 전장부품에서 전력소자가 핵심부품으로 자리 잡을 전망이다. 지금까지는 실리콘 기반의 전력소자 기술이 전력반도체 시장의 대부분을 주도하고 있지만 전력기기 로드맵에 의하면 전력밀도가 해를 거듭하면서 지속적으로 증가하기 때문에 내열, 내압, 전력손실, 전력밀도 등에서 나타나는 많은 한계를 가지고 있는 현재의 실리콘 기반 전력시스템은 효율이 눈에 띄게 감소할 것이 자명하므로 전력시스템의 전력전송효율과 신뢰성의 중요성이 크게 대두되고 있다. 이 같은 사회적 요구로 볼 때 현재의 실리콘 전력소자의 기술적 한계를 뛰어넘는 고효율의 차세대 전력반도체 소자의 개발이 시급히 요구되며 SiC와 GaN와 같은 광대역 반도체가 차세대 전력반도체 소재로 유력해지고 있다. 또한 전력시스템에서는 시스템의 안전성과 회로의 간략화를 위하여 normally-off (증강형) 전력소자가 요구되기 때문에 normally-off (증강형) GaN 전력소자에 대한 개발이 필수적이다. 본 그룹에서는 gate-recess 공정을 이용하여 normally-off 동작을 실현하는 연구를 진행하였고, gate-recess 시 발생하는 식각 데미지를 줄이고 우수한 성능의 게이트 절연막을 개발하여 GaN 전력 반도체 소자의 전기적 특성 및 신뢰성을 개선하는 연구를 진행하였다. 식각 연구에서는 최종적으로 셀프 DC 바이어스가 낮은 O2, BCl3 플라즈마를 이용한 atomic layer etching을 개발하였고, 이를 통해 거칠기가 작고 표면 N vacancy가 적은 고품질의 (Al)GaN 표면을 얻을 수 있었다. 박막 연구에서는 Oxide 박막 증착 시, (Al)GaN 표면에 생성되어 계면 특성을 악화시키는 Ga2O3 생성을 막기위해 ALD AlN layer를 개발 및 적용하여 박막/(Al)GaN 계면 특성을 향상시켰다. 이로 인해 소자의 동작전류 증가 및 Dit 감소 결과를 얻을 수 있었고 스트레스에 따른 문턱전압 이동 특성의 감소로 소자의 신뢰성 또한 개선시킬 수 있었다. 이는 타 기관의 결과와 비교해도 뒤떨어지지 않는 우수한 특성을 보여주었다. 결론적으로 본 연구의 작은 플라즈마 데미지를 갖는 식각공정과 고품질 절연막 개발을 통해 우수한 특성의 GaN 전력소자를 구현할 수 있었고 향후 차세대 전력소자에 적용을 위한 가능성을 확보하였다.The Si technology for power devices have already approached its theoretical limitations due to its physical and material properties, despite the considerable efforts such as super junction MOSFET, trench gate, and insulated gate bipolar transistors. To overcome these limitations, many kinds of compound materials such as GaN, GaAs, SiC, Diamond and InP which have larger breakdown voltage and high electron velocity than Si also have been studied as future power devices. GaN has been considered as a breakthrough in power applications due to its high critical electric field, high saturation velocity and high electron mobility compared to Si, GaAs, and SiC. Especially, AlGaN/GaN heterostructure field-effect transistors (HFETs) have been considered as promising candidates for high power and high voltage applications. However, these AlGaN/GaN heterostructure field-effect transistors with the 2DEG are naturally normally-on, which makes the devices difficult to deplete the channel at zero gate bias. Among the various methods for normally-off operation of GaN devices, gate-recess method is a promising method because it can be easier to implement than other approaches and ensure normally-off operation. However, charge trapping at the interface between gate dielectric and (Al)GaN and in the gate dielectric is a big issue for recessed gate MIS-HEMTs. This problem leads to degradation of channel mobility, on-resistance and on-current of the devices. Especially, Vth hysteresis after a positive gate voltage sweep and Vth shift under a gate bias stress are important reliability challenges in gate recessed MIS-HEMTs. The scope of this work is mainly oriented to achieve high quality interface at dielectric/(Al)GaN MIS by studying low damage etching methods and the ALD process of various dielectric layers. In the etching study, various etching methods for normally-off operation have been studied. Also, etching damage was evaluated by various methods such as atomic force microscopy (AFM), photoluminescence (PL) measurements, X-ray photoelectron spectroscopy (XPS) measurements and electrical properties of the recessed schottky devices. Among the etching methods, the ALE shows the smoothest etched surface, the highest PL intensity and N/(Al+Ga) ratio of the etched AlGaN surface and the lowest leakage current of the gate recessed schottky devices. It is suggested that the ALE is a promising etching technique for normally-off gate recessed AlGaN/GaN MIS-FETs. In the study of dielectrics, excellent electrical characteristics and small threshold volt¬age drift under positive gate bias stress are achieved by employing the SiON interfacial layer. However, considerable threshold voltage drift is observed under the higher positive gate bias stress even at the devices using the SiON interfacial layer. For further improvement of interface and reliability of devices, we develop and optimize an ALD AlN as an interfacial layer to avoid the formation of poor-quality oxide at the dielectric/(Al)GaN interface. We also develop an ALD AlHfON as a bulk layer, which have a high dielectric constant and low leakage current and high breakdown field characteristics. Devices with AlN/AlON/AlHfON layer show smaller I-V hysteresis of ~10 mV than that of devices with AlON/AlHfON layer. The extracted static Ron values of devices with AlN/AlON/AlHfON and AlON/AlHfON are 1.35 and 1.69 mΩ·cm2, respectively. Besides, the effective mobility, Dit and threshold voltage instability characteristics are all improved by employing the ALD AlN. In conclusion, for high performance and improvement of reliability of normally-off AlGaN/GaN MIS-FETs, this thesis presents an etching technique for low damage etching and high-quality gate dielectric layer and suggests that the ALE and ALD AlN/AlON/AlHfON gate dielectric are very promising for the future normally-off AlGaN/GaN MIS-FETsChapter 1. Introduction 1 1.1. Backgrounds 1 1.2. Normally-off Operation in AlGaN/GaN HFETs 3 1.3. Issues and Feasible Strategies in AlGaN/GaN MIS-HFETs 11 1.4. Research Aims 15 1.5. References 17 Chapter 2. Development and Evaluation of Low Damage Etching processes 22 2.1. Introduction 22 2.2. Various Evaluation Methods of Etching Damage 24 2.3. Low-Damage Dry Etching Methods 29 2.3.1. Inductively Coupled Plasma-Reactive Ion Etching Using BCl3/Cl2 Gas Mixture 29 2.3.2. Digital Etching Using Plasma Asher and HCl 34 2.3.3. Atomic Layer Etching Using Inductively Coupled Plasma–Reactive Ion Etching System (ICP-RIE) 50 2.4. Conclusion 75 2.5. References 76 Chapter 3. SiON/HfON Gate Dielectric Layer by ALD for AlGaN/GaN MIS-FETs 80 3.1. Introduction 80 3.2. ALD Processes for SiON and HfON 83 3.3. Electrical Characteristics of ALD SiON, HfON and SiON/HfON Dual Layer on n-GaN 87 3.4. Device Characteristics of Normally-off AlGaN/GaN MIS-FETs with SiON/HfON Dual Layer 95 3.5. Conclusion 113 3.6. References 114 Chapter 4. High Quality AlN/AlON/AlHfON Gate Dielectric Layer by ALD for AlGaN/GaN MIS-FETs 120 4.1. Introduction 120 4.2. Development of ALD AlN/AlON/AlHfON Gate Stack 122 4.2.1. Process Optimization for ALD AlN 122 4.2.2. ALD AlN as an Interfacial Layer 144 4.2.3. Thickness Optimization of AlN/AlON/ AlHfON Layer 149 4.2.4. ALD AlHfON Optimization 159 4.2.5. Material Characteristics of AlN/AlON/AlHfON Layer 167 4.3. Device Characteristics of Normally-off AlGaN/GaN MIS-FETs with AlN/AlON/AlHfON Layer 171 4.4. Conclusion 182 4.5. References 183 Chapter 5. Concluding Remarks 188 Appendix. 190 A. N2 Plasma Treatment Before Dielectric Deposition 190 B. Tri-gate Normally-on/off AlGaN/GaN MIS-FETs 200 C. AlGaN/GaN Diode with MIS-gated Hybrid Anode and Edge termination 214 Abstract in Korean 219 Research Achievements 221Docto

Organic functionalisation, doping and characterisation of semiconductor surfaces for future CMOS device applications

Organic Functionalisation, Doping and Characterisation of Semiconductor Surfaces for Future CMOS Device Applications Semiconductor materials have long been the driving force for the advancement of technology since their inception in the mid-20th century. Traditionally, micro-electronic devices based upon these materials have scaled down in size and doubled in transistor density in accordance with the well-known Moore’s law, enabling consumer products with outstanding computational power at lower costs and with smaller footprints. According to the International Technology Roadmap for Semiconductors (ITRS), the scaling of metal-oxide-semiconductor field-effect transistors (MOSFETs) is proceeding at a rapid pace and will reach sub-10 nm dimensions in the coming years. This scaling presents many challenges, not only in terms of metrology but also in terms of the material preparation especially with respect to doping, leading to the moniker “More-than-Moore”. Current transistor technologies are based on the use of semiconductor junctions formed by the introduction of dopant atoms into the material using various methodologies and at device sizes below 10 nm, high concentration gradients become a necessity. Doping, the controlled and purposeful addition of impurities to a semiconductor, is one of the most important steps in the material preparation with uniform and confined doping to form ultra-shallow junctions at source and drain extension regions being one of the key enablers for the continued scaling of devices. Monolayer doping has shown promise to satisfy the need to conformally dope at such small feature sizes. Monolayer doping (MLD) has been shown to satisfy the requirements for extended defect-free, conformal and controllable doping on many materials ranging from the traditional silicon and germanium devices to emerging replacement materials such as III-V compounds This thesis aims to investigate the potential of monolayer doping to complement or replace conventional doping technologies currently in use in CMOS fabrication facilities across the world

Study of High-k Dielectrics and their Interfaces on Semiconductors for Device Applications

This thesis has focused on two emerging applications of high-k dielectrics in Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) and in Metal-InsulatorSemiconductor High Electron Mobility Transistors (MIS-HEMTs). The key aim has been to propose the best routes for passivation of semiconductor/high-k oxide interfaces by investigating the band alignments and interface properties of several oxides, such as Tm2O3, Ta2O5, ZrO2, Al2O3 and MgO, deposited on different semiconductors: Si, Ge, GaN, InGaAs and InGaSb. The electrical characterisation of fabricated MIS capacitor and (MIS)-HEMT devices have also been performed. Thulium silicate (TmSiO) has been identified as a promising candidate for integration as interfacial layer (IL) in HfO2/TiN MOSFETs. The physical properties of Tm2O3/IL/Si interface have been elucidated, where IL (TmSiO) has been formed using different post-deposition annealing (PDA) temperatures, from 550 to 750 °C. It has been found that the best-scaled stack (sub-nm IL) is formed at 550 °C PDA with a graded interface layer and a strong SiOx (Si 3+) component. A large valence band offset (VBO) of 2.8 eV and a large conduction band offset (CBO) of 1.9 eV have been derived for Tm2O3/Si by X-ray photoelectron spectroscopy (XPS) and variable angle spectroscopic ellipsometry. Further increase of device performance can be achieved by replacing Si with GaN for high frequency, high power and high-temperature operation. In this thesis, several GaN cleaning procedures have been considered: 30% NH4OH, 20% (NH4)2S, and 37% HCl. It has been found that the HCl treatment shows the lowest oxygen contamination and Garich surface, and hence has been used prior sputtering of Ta2O5, Al2O3, ZrO2 and MgO on GaN. The large VBOs of 1.1 eV and 1.2 eV have been derived for Al2O3 and MgO on GaN respectively, using XPS and Kraut’s method; the corresponding CBOs are 2.0 eV and 2.8 eV respectively, taking into account the band gaps of Al2O3 (6.5 eV) and MgO (7.4 eV) determined from XPS O 1s electron energy spectra. The lowest leakage currents were obtained for devices with Al2O3 and MgO, i.e. 5.3 ×10-6 A/cm2 and 3.2 ×10-6 A/cm2 at 1 V, respectively in agreement with high band offsets (> 1 eV). Furthermore, the effect of different surface treatments (HCl, O2 plasma and 1-Octadecanethiol (ODT)) prior to atomic layer deposition of Al2O3 on the GaN/AlGaN/GaN heterostructure has been investigated. The MIS-HEMTs fabricated using the low-cost ODT GaN surface treatment have been found to exhibit superior performance for power switching applications such as a low threshold voltage, VT of -12.3 V, hysteresis of 0.12 V, a small subthreshold voltage slope (SS) of 73 mV/dec, and a low density of interface states, Dit of 3.0 x10^12 cm-2eV-1. A comprehensive novel study of HfO2/InGaAs and Al2O3/InGaSb interfaces have also been conducted for use in III-V based MOSFETs. The addition of the plasma H2/TMA/H2 pre-cleaning has been found to be very effective in recovering etch damage on InGaAs, especially for (110) orientation, and led to the improvement of electrical characteristics. Furthermore, the combination of H2 plasma exposure and forming gas anneal yielded significantly improved metrics for Al2O3/InGaSb over the control HCltreated sample, with the 150 W plasma treatment giving both the highest capacitance and the lowest stretch out

Advanced gallium nitride technology for microwave power amplifiers

Gallium nitride (GaN) based technology has been heavily researched over the past two decades due to its ability to deliver higher powers and higher frequencies that are demanded by the market for various applications. One of GaN’s main advantages lies in its ability to form heterojunctions to wider bandgap materials such as Aluminium Gallium Nitride (AlGaN) and Aluminium Nitride (AlN). The heterostructure results in the formation of the so called 2 dimensional electron gas (2DEG), which exhibits high electron densities of up to 6E13 cm−2 and high electron mobilities of up to 2000 cm2/V·s that enable the devices to support high current densities. Furthermore, it supports very high breakdown fields of 3.3 MV/cm due to its wide bandgap of 3.4 eV. The main objective of this work was to further advance the transistor technology using simple, cost effective and reliable techniques. The AlN/GaN material system exhibits higher sheet carrier concentrations compared to the conventional ternary AlGaN barrier, but introduces additional challenges due to its reduced thickness of 2-6 nm compared to 18-30 nm of AlGaN. The additional challenges of the thin AlN binary barrier include strain relaxation, high gate leakage currents and high Ohmic contact resistances due to its high bandgap of 6.2 eV. In this work, a thin (5 nm) in-situ SiNx passivation layer was employed to reduce the strain relaxation, reduce gate leakage currents and improve Ohmic contacts resistances. The optimised Ohmic contact annealing condition resulted in an Ohmic contact resistance of 0.4 Ω·mm and a sheet resistance of 300 Ω

Optimisation of high-efficiency UV and visible light sources utilising lateral localisation in InAlN and InGaN based nano-structure devices

III-nitride semiconductor materials (including GaN, InN and AlN and their alloys), have the capability to emit light at wavelengths spanning from the near IR to the deep UV. However, understanding these materials is challenging due to the presence of strong polarisation fields and large difference in optimum growth temperature between binary compounds are two such examples. InAlN is perhaps the least well understood III-N alloy. It has potential be applied for optoelectronic devices operating in the UV spectral range. However, the variation of band-gap with alloy composition, particularly in the low In content regime, is not understood. In this work, a strongly composition dependent bowing parameter has been observed for ~100 nm thick InxAl1−xN epitaxial layers with 0 ≤ x ≤ 0.224, grown by metalorganic vapour phase epitaxy (MOVPE), prepared on AlN/Al2O3-templates. Also a double absorption edge was observed for InAlN with x < 0.01, attributed to crystal-field splitting of the highest valence band states. These results indicate that the ordering of the valence bands is changed at much lower In contents than linear interpolation of the valence band parameters would predict. Coupling our results with the published literature data the band-gap and bowing parameter of InAlN across the full composition range were determined. Additionally, applying the InAlN band-gap data with those for other alloys the refractive index of III-N alloys is predicted using an Adachi model resulting in a very good agreement with previous experimental data where available. For InAlN/AlGaN multi-quantum-wells (MQWs) excited by photoluminescence (PL) and emitting between 300-350 nm, high apparent internal quantum efficiencies (IQE) (IPL(300 K)/IPL(T)max) of up to 70% were obtained. This is attributed to the exceptionally strong carrier localisation in this material, which is also manifested by a high Stokes shift (0.52 eV) of the luminescence. A non-monotonic dependence of luminescence efficiency on indium content with a maximum at about 18% In was explained as a trade-off between a strain relaxation for higher indium contents and a type I to type II band line-up conversion for low In content alloys. Nanoscale materials have attracted a lot of attention due to their ability to decrease dislocations as well as build-in field reduction. In the second part of this thesis, GaN nanostructures, were used as templates for InGaN MQW growth targeting nano-LED structures. Two nano-structuring methods were examined; using GaN nano-columns (NCs) following an etch regrowth methodology, and selective area aperture growth (SAG). In the former case we determined the optimal etch conditions for the GaN columns and conditions for overgrowth InGaN QWS. The rod tops formed semipolar facets. InGaN QWs grown on these pyramids were found to be extremely thin leading to difficulties in obtaining PL in our case. Using the SAG approach, nano-pyramids were formed in nano-apertures, with good uniformity. InGaN QWs exhibited blue PL, which cathodoluminescence (CL) showed to be made up of two spectral features, attributed to the pyramid nano-facets and pyramid apex tips, respectively

Feature Papers in Electronic Materials Section

This book entitled "Feature Papers in Electronic Materials Section" is a collection of selected papers recently published on the journal Materials, focusing on the latest advances in electronic materials and devices in different fields (e.g., power- and high-frequency electronics, optoelectronic devices, detectors, etc.). In the first part of the book, many articles are dedicated to wide band gap semiconductors (e.g., SiC, GaN, Ga2O3, diamond), focusing on the current relevant materials and devices technology issues. The second part of the book is a miscellaneous of other electronics materials for various applications, including two-dimensional materials for optoelectronic and high-frequency devices. Finally, some recent advances in materials and flexible sensors for bioelectronics and medical applications are presented at the end of the book