378 research outputs found

    Efficient and multiplierless design of FIR filters with very sharp cutoff via maximally flat building blocks

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    A new design technique for linear-phase FIR filters, based on maximally flat buildiing blocks, is presented. The design technique does not involve iterative approximations and is, therefore, fast. It gives rise to filters that have a monotone stopband response, as required in some applications. The technique is partially based on an interpolative scheme. Implementation of the obtained filter designs requires a much smaller number of multiplications than maximally flat (MAXFLAT) FIR filters designed by the conventional approach. A technique based on FIR spectral transformations to design new multiplierless FIR filter structures is then advanced, and multiplierless implementations for sharp cutoff specifications are included

    Efficient and multiplierless design of FIR filters with very sharp cutoff via maximally flat building blocks

    Get PDF
    A new design technique for linear-phase FIR filters, based on maximally flat buildiing blocks, is presented. The design technique does not involve iterative approximations and is, therefore, fast. It gives rise to filters that have a monotone stopband response, as required in some applications. The technique is partially based on an interpolative scheme. Implementation of the obtained filter designs requires a much smaller number of multiplications than maximally flat (MAXFLAT) FIR filters designed by the conventional approach. A technique based on FIR spectral transformations to design new multiplierless FIR filter structures is then advanced, and multiplierless implementations for sharp cutoff specifications are included

    Optimal design of linear phase FIR digital filters with very flat passbands and equiripple stopbands

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    A new technique is presented for the design of digital FIR filters, with a prescribed degree of flatness in the passband, and a prescribed (equiripple) attenuation in the stopband. The design is based entirely on an appropriate use of the well-known Reméz-exchange algorithm for the design of weighted Chebyshev FIR filters. The extreme versatility of this algorithm is combined with certain "maximally flat" FIR filter building blocks, in order to generate a wide family of filters. The design technique directly leads to structures that have low passband sensitivity properties

    Efficient Digital Signal Processing Techniques and Architectures for On-Board Processors

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    In this paper, we present a number of algorithmic and architectural DSP solutions to be incorporated in digital OBPs for communication satellites to boost the system performance primarily in terms of reducing their power consumption. More specifically this article addresses (1) Infinite impulse response (IIR) implementation of digital filters, (2) Efficiency savings in channeliser FFT twiddle storage and multiplications and their reconfigurable implementation (3) Companding of interconnect data, and (4) Critically sampled/reduced over-sampling channelisation. The applicability and efficiency of these approaches were evaluated in detail during our European Space Agency (ESA) funded research project entitled "Efficient Techniques for On-Board Processing”, undertaken by Airbus Defence and Space and the Applied DSP and VLSI Research Group at the University of Westminster. The results demonstrated noteworthy improvements both in terms of power dissipation, and furthermore in the reduction of circuit complexity for future digital OBPs, which will be shown at the summary of results section

    New design methods for FIR filters with equiripple stopbands and prescribed degrees of passband flatness

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    A technique is presented for designing linear-phase digital FIR filters, with a prescribed degree of flatness in the passband, and a prescribed (equiripple) attenuation in the stopband. The design is based entirely on appropriate use of the McClellan-Parks algorithm along with certain maximally flat building blocks

    FPGA based Uniform Channelizer Implementation

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    Channelizers are widely used in modern digital communication systems. Advanced uniform multirate channelization have been theoretically proved to be capable of reducing the computational load, with a better performance. Therefore, in this thesis, we implement these designs on a FPGA board for the sake of the comprehensive evaluation of resource usage, performance and frequency response. The uniform filter-banks are one of the most essential unit in channelization. The Generalised Discrete Fourier Transform Modulated Filter Bank (GDFT-FB), as an important variant of basic a DFT-FB, has been implemented in FPGA and demonstrated with a better computational saving rather than traditional schemes. Moreover the oversampling version is demonstrated to have a better frequency response with an acceptable amount of extra resources. On the other hand, frequency response masking (FRM) techniques is able to reduce the number of coefficients. Therefore, the full FRM GDFT-FB and alternative narrowband FRM GDFT-FB are both implemented in FPGA platform, in order to achieve a better performance and hardware efficiency

    Digital Filters

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    The new technology advances provide that a great number of system signals can be easily measured with a low cost. The main problem is that usually only a fraction of the signal is useful for different purposes, for example maintenance, DVD-recorders, computers, electric/electronic circuits, econometric, optimization, etc. Digital filters are the most versatile, practical and effective methods for extracting the information necessary from the signal. They can be dynamic, so they can be automatically or manually adjusted to the external and internal conditions. Presented in this book are the most advanced digital filters including different case studies and the most relevant literature

    Synthesis methods for linear-phase FIR filters with a piecewise-polynomial impulse response

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    his thesis concentrates on synthesis methods for linear-phase finite-impulse response filters with a piecewise-polynomial impulse response. One of the objectives has been to find integer-valued coefficients to efficiently implement filters of the piecewise-polynomial impulse response approach introduced by Saram¨aki and Mitra. In this method, the impulse response is divided into blocks of equal length and each block is created by a polynomial of a given degree. The arithmetic complexity of these filters depends on the polynomial degree and the number of blocks. By using integer-valued coefficients it is possible to make the implementation of the subfilters, which generates the polynomials, multiplication-free. The main focus has been on finding computationally-efficient synthesis methods by using a piecewise-polynomial and a piecewise-polynomial-sinusoidal impulse responses to make it possible to implement high-speed, low-power, highly integrated digital signal processing systems. The earlier method by Chu and Burrus has been studied. The overall impulse response of the approach proposed in this thesis consists of the sum of several polynomial-form responses. The arithmetic complexity depends on the polynomial degree and the number of polynomial-form responses. The piecewise-polynomial-sinusoidal approach is a modification of the piecewise-polynomial approach. The subresponses are multiplied by a sinusoidal function and an arbitrary number of separate center coefficients is added. Thereby, the arithmetic complexity depends also on the number of complex multipliers and separately generated center coefficients. The filters proposed in this thesis are optimized by using linear programming methods
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