Nanoelectromechanical relay without pull-in instability for high-temperature non-volatile memory

Emerging applications such as the Internet-of-Things and more-electric aircraft require electronics with integrated data storage that can operate in extreme temperatures with high energy efficiency. As transistor leakage current increases with temperature, nanoelectromechanical relays have emerged as a promising alternative. However, a reliable and scalable non-volatile relay that retains its state when powered off has not been demonstrated. Part of the challenge is electromechanical pull-in instability, causing the beam to snap in after traversing a section of the airgap. Here we demonstrate an electrostatically actuated nanoelectromechanical relay that eliminates electromechanical pull-in instability without restricting the dynamic range of motion. It has several advantages over conventional electrostatic relays, including low actuation voltages without extreme reduction in critical dimensions and near constant actuation airgap while the device moves, for improved electrostatic control. With this nanoelectromechanical relay we demonstrate the first high-temperature non-volatile relay operation, with over 40 non-volatile cycles at 200 ∘C

Fabrication and Characterization of Double- and Single-Clamped CuO Nanowire Based Nanoelectromechanical Switches

Funding Information: This research was funded by the European Regional Development Fund (project no. 1.1.1.1/16/A/256, ?Creation of nanoelectromechanical switches?). Publisher Copyright: © 2021 by the authors. Licensee MDPI, Basel, Switzerland.Electrostatically actuated nanoelectromechanical (NEM) switches hold promise for operation with sharply defined ON/OFF states, high ON/OFF current ratio, low OFF state power consumption, and a compact design. The present challenge for the development of nanoelectromechanical system (NEMS) technology is fabrication of single nanowire based NEM switches. In this work, we demonstrate the first application of CuO nanowires as NEM switch active elements. We develop bottom-up and top-down approaches for NEM switch fabrication, such as CuO nanowire synthesis, lithography, etching, dielectrophoretic alignment of nanowires on electrodes, and nanomanipulations for building devices that are suitable for scalable production. Theoretical modelling finds the device geometry that is necessary for volatile switching. The modelling results are validated by constructing gateless double-clamped and single-clamped devices on-chip that show robust and repeatable switching. The proposed design and fabrication route enable the scalable integration of bottom-up synthesized nanowires in NEMS.publishersversionPeer reviewe

Interrogation of Single Asperity Electrical Contacts Using atomic force Microscopy With Application to Nems Logic Switches

Energy consumption by computers and electronics is currently 15% of worldwide energy output, and growing. Aggressive scaling of the fully-electronic transistor, which is the fundamental computational element of these devices, has led to significant and immutable energy losses. Ohmic nanoelectromechanical systems (NEMS) logic switches have been recognized as a potential transistor replacement technology with projected energy savings of one to three orders of magnitude over traditional, fully-electronic transistors. However, the use of conventional, adhesive contact materials (i.e. metals) in NEMS switches electrical contacts leads to permanent device seizure or the formation of insulating tribofilms that inhibits commercialization of this technology. Of critical need is a method to efficiently identify and interrogate low adhesion, chemically stable electrical contact material pairs under conditions and scales relevant to NEMS logic switch contacts. This thesis presents the development of two electrical contact testing methods based on atomic force microscopy (AFM) to interrogate electrical contact materials under contact forces and environments representative of NEMS logic switch operating conditions. AFM was used to mimic the interaction of Pt/Pt NEMS logic switch electrical interfaces for up to two billion contact cycles in laboratory timeframes. Contact resistance before cycling significantly exceeded theoretical predictions for clean Pt/Pt interfaces due to adsorbed contaminant films and increased up to six orders of magnitude due to cycling-induced insulating tribopolymer growth. Sliding of the contact with microscale amplitudes lead to significant recovery of conductivity through displacement of the insulating films. Based on this observation, AFM was then used to investigate the role of load, shear, electrical bias, and environment on the electrical robustness of Pt/nitrogen-incorporated ultrananocrystalline diamond (N-UNCD) and Pt/Pt interfaces. N-UNCD was selected because similar diamond films have demonstrated low adhesion, chemical inertness, and compatibility with NEMS logic device fabrication. Pt/N-UNCD interfaces subjected to low loads during sliding demonstrated significant increases in contact resistance due to insulating film formation that was not observed at larger loads. Taken in concert, these finding demonstrate the capability of AFM to investigate nanoscale electrical contact phenomena without the need for time-consuming and expensive integration of unproven materials in NEMS logic switches

Peranti suis nanoelektromekanikal (NEM) berunsurkan grafin dan tiub nano karbon (CNT)

Suis nanoelektromekanikal (NEM) mempunyai persamaan dengan suis konvensional semikonduktor apabila digunakan sebagai transistor dan penderia walaupun prinsip operasinya berbeza. Perbezaan prinsip operasi suis ini memberikan kelebihan kepada suis NEM untuk beroperasi dalam persekitaran yang melampau manakala suis konvensional semikonduktor mempunyai kelebihan daripada segi infrastruktur fabrikasi yang canggih. Dalam kertas ini, kami mengulas kemajuan terbaru dan potensi teknologi NEM dalam aplikasi pensuisan berdasarkan bahan berasaskan karbon seperti CNT dan grafin. Kemajuan reka bentuk geometri suis NEM seperti struktur rusuk berlubang, mempunyai kelebihan daripada segi voltan operasi peranti yang rendah, turut dibincangkan dalam kertas ini. Berdasarkan Kitaran Gemburan Gartner, teknologi, proses dan produk untuk suis NEM atau hibrid NEM-CMOS berada di takuk berbeza iaitu di jurang ilusi, cerun pencerahan dan dataran tinggi produktiviti. Kemudian, reka bentuk geometri suis NEM berasaskan bahan-bahan ini diulas dengan lengkap berdasarkan kajian kepustakaan terbaru. Kami mengenal pasti cabaran yang terlibat dalam proses fabrikasi suis NEM berasaskan CNT dan grafin seperti kebocoran get dan proses litografi yang mencabar. Kesimpulannya, kami meringkaskan kertas kajian ini kepada beberapa sudut perspektif, pandangan dan peluang pada masa depan dalam teknologi suis NEM