CLEX: Yet Another Supercomputer Architecture?

We propose the CLEX supercomputer topology and routing scheme. We prove that CLEX can utilize a constant fraction of the total bandwidth for point-to-point communication, at delays proportional to the sum of the number of intermediate hops and the maximum physical distance between any two nodes. Moreover, % applying an asymmetric bandwidth assignment to the links, all-to-all communication can be realized $(1+o(1))$-optimally both with regard to bandwidth and delays. This is achieved at node degrees of $n^{\varepsilon}$, for an arbitrary small constant $\varepsilon\in (0,1]$. In contrast, these results are impossible in any network featuring constant or polylogarithmic node degrees. Through simulation, we assess the benefits of an implementation of the proposed communication strategy. Our results indicate that, for a million processors, CLEX can increase bandwidth utilization and reduce average routing path length by at least factors $10$ respectively $5$ in comparison to a torus network. Furthermore, the CLEX communication scheme features several other properties, such as deadlock-freedom, inherent fault-tolerance, and canonical partition into smaller subsystems

Performance Modelling and Optimisation of Multi-hop Networks

A major challenge in the design of large-scale networks is to predict and optimise the total time and energy consumption required to deliver a packet from a source node to a destination node. Examples of such complex networks include wireless ad hoc and sensor networks which need to deal with the effects of node mobility, routing inaccuracies, higher packet loss rates, limited or time-varying effective bandwidth, energy constraints, and the computational limitations of the nodes. They also include more reliable communication environments, such as wired networks, that are susceptible to random failures, security threats and malicious behaviours which compromise their quality of service (QoS) guarantees. In such networks, packets traverse a number of hops that cannot be determined in advance and encounter non-homogeneous network conditions that have been largely ignored in the literature. This thesis examines analytical properties of packet travel in large networks and investigates the implications of some packet coding techniques on both QoS and resource utilisation. Specifically, we use a mixed jump and diffusion model to represent packet traversal through large networks. The model accounts for network non-homogeneity regarding routing and the loss rate that a packet experiences as it passes successive segments of a source to destination route. A mixed analytical-numerical method is developed to compute the average packet travel time and the energy it consumes. The model is able to capture the effects of increased loss rate in areas remote from the source and destination, variable rate of advancement towards destination over the route, as well as of defending against malicious packets within a certain distance from the destination. We then consider sending multiple coded packets that follow independent paths to the destination node so as to mitigate the effects of losses and routing inaccuracies. We study a homogeneous medium and obtain the time-dependent properties of the packet’s travel process, allowing us to compare the merits and limitations of coding, both in terms of delivery times and energy efficiency. Finally, we propose models that can assist in the analysis and optimisation of the performance of inter-flow network coding (NC). We analyse two queueing models for a router that carries out NC, in addition to its standard packet routing function. The approach is extended to the study of multiple hops, which leads to an optimisation problem that characterises the optimal time that packets should be held back in a router, waiting for coding opportunities to arise, so that the total packet end-to-end delay is minimised

Fault-tolerant onboard digital information switching and routing for communications satellites

The NASA Lewis Research Center is developing an information-switching processor for future meshed very-small-aperture terminal (VSAT) communications satellites. The information-switching processor will switch and route baseband user data onboard the VSAT satellite to connect thousands of Earth terminals. Fault tolerance is a critical issue in developing information-switching processor circuitry that will provide and maintain reliable communications services. In parallel with the conceptual development of the meshed VSAT satellite network architecture, NASA designed and built a simple test bed for developing and demonstrating baseband switch architectures and fault-tolerance techniques. The meshed VSAT architecture and the switching demonstration test bed are described, and the initial switching architecture and the fault-tolerance techniques that were developed and tested are discussed

OPTIMIZATION MODELS AND METHODOLOGIES TO SUPPORT EMERGENCY PREPAREDNESS AND POST-DISASTER RESPONSE

This dissertation addresses three important optimization problems arising during the phases of pre-disaster emergency preparedness and post-disaster response in time-dependent, stochastic and dynamic environments. The first problem studied is the building evacuation problem with shared information (BEPSI), which seeks a set of evacuation routes and the assignment of evacuees to these routes with the minimum total evacuation time. The BEPSI incorporates the constraints of shared information in providing on-line instructions to evacuees and ensures that evacuees departing from an intermediate or source location at a mutual point in time receive common instructions. A mixed-integer linear program is formulated for the BEPSI and an exact technique based on Benders decomposition is proposed for its solution. Numerical experiments conducted on a mid-sized real-world example demonstrate the effectiveness of the proposed algorithm. The second problem addressed is the network resilience problem (NRP), involving an indicator of network resilience proposed to quantify the ability of a network to recover from randomly arising disruptions resulting from a disaster event. A stochastic, mixed integer program is proposed for quantifying network resilience and identifying the optimal post-event course of action to take. A solution technique based on concepts of Benders decomposition, column generation and Monte Carlo simulation is proposed. Experiments were conducted to illustrate the resilience concept and procedure for its measurement, and to assess the role of network topology in its magnitude. The last problem addressed is the urban search and rescue team deployment problem (USAR-TDP). The USAR-TDP seeks an optimal deployment of USAR teams to disaster sites, including the order of site visits, with the ultimate goal of maximizing the expected number of saved lives over the search and rescue period. A multistage stochastic program is proposed to capture problem uncertainty and dynamics. The solution technique involves the solution of a sequence of interrelated two-stage stochastic programs with recourse. A column generation-based technique is proposed for the solution of each problem instance arising as the start of each decision epoch over a time horizon. Numerical experiments conducted on an example of the 2010 Haiti earthquake are presented to illustrate the effectiveness of the proposed approach

Providing Performance Guarantees in Data Center Network Switching Fabrics

This paper proposes a novel and highly scalable multistage packet-switch design based on Networks-on-Chip (NoC). In particular, we describe a three-stage packet-switch fabric with a Round-Robin packets dispatching scheme where each central stage module is an Output-Queued Unidirectional NoC (OQ-UDN), instead of the conventional single-hop crossbar. We test the switch performance under different traffic profiles. In addition to experimental results, we present an analytical approximation for the theoretical throughput of the switch under Bernoulli i.i.d arrivals. We also provide an upper-bound estimation of the end-to-end blocking probability in the proposed switch to help predict performance and to optimize the design