35,799 research outputs found

    Integrating IR detector imaging systems

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    An integrating IR detector array for imaging is provided in a hybrid circuit with InSb mesa diodes in a linear array, a single J-FET preamplifier for readout, and a silicon integrated circuit multiplexer. Thin film conductors in a fan out pattern deposited on an Al2O3 substrate connect the diodes to the multiplexer, and thick film conductors also connect the reset switch and preamplifier to the multiplexer. Two phase clock pulses are applied with a logic return signal to the multiplexer through triax comprised of three thin film conductors deposited between layers. A lens focuses a scanned image onto the diode array for horizontal read out while a scanning mirror provides vertical scan

    Programmed multiplexing system simultaneously monitors several voltages

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    System consists of digital voltmeter with binary coded decimal output, programmer, multiplexer, and two to six gated digital displays. Maximum number of circuits monitored is determined by digital voltmeter, rate of change of parameter being measured and complexity of multiplexer design

    Signal multiplexer

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    Impedance transformation device for signal mixin

    Reconfigurable optical add-drop multiplexer using microring resonators

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    We report a reconfigurable four-channel optical add-drop multiplexer for use in access networks. The optical add-drop multiplexer (OADM) is based on vertically coupled thermally tunable Si/sub 3/N/sub 4/--SiO/sub 2/ microring resonators (MRs) and has been realized on a footprint of 0.25 mm/sup 2/. Individual MRs in the OADM can be tuned across the full free-spectral range of 4.18 nm and have a 3-dB bandwidth of 50 GHz

    Time-division SQUID multiplexers with reduced sensitivity to external magnetic fields

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    Time-division SQUID multiplexers are used in many applications that require exquisite control of systematic error. One potential source of systematic error is the pickup of external magnetic fields in the multiplexer. We present measurements of the field sensitivity figure of merit, effective area, for both the first stage and second stage SQUID amplifiers in three NIST SQUID multiplexer designs. These designs include a new variety with improved gradiometry that significantly reduces the effective area of both the first and second stage SQUID amplifiers.Comment: 4 pages, 7 figures. Submitted for publication in the IEEE Transactions on Applied Superconductivity, August 201

    Advanced code-division multiplexers for superconducting detector arrays

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    Multiplexers based on the modulation of superconducting quantum interference devices are now regularly used in multi-kilopixel arrays of superconducting detectors for astrophysics, cosmology, and materials analysis. Over the next decade, much larger arrays will be needed. These larger arrays require new modulation techniques and compact multiplexer elements that fit within each pixel. We present a new in-focal-plane code-division multiplexer that provides multiplexing elements with the required scalability. This code-division multiplexer uses compact lithographic modulation elements that simultaneously multiplex both signal outputs and superconducting transition-edge sensor (TES) detector bias voltages. It eliminates the shunt resistor used to voltage bias TES detectors, greatly reduces power dissipation, allows different dc bias voltages for each TES, and makes all elements sufficiently compact to fit inside the detector pixel area. These in-focal-plane code-division multiplexers can be combined with multi-gigahertz readout based on superconducting microresonators to scale to even larger arrays.Comment: 8 pages, 3 figures, presented at the 14th International Workshop on Low Temperature Detectors, Heidelberg University, August 1-5, 2011, proceedings to be published in the Journal of Low Temperature Physic

    Reconfigurable data path processor

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    A reconfigurable data path processor comprises a plurality of independent processing elements. Each of the processing elements advantageously comprising an identical architecture. Each processing element comprises a plurality of data processing means for generating a potential output. Each processor is also capable of through-putting an input as a potential output with little or no processing. Each processing element comprises a conditional multiplexer having a first conditional multiplexer input, a second conditional multiplexer input and a conditional multiplexer output. A first potential output value is transmitted to the first conditional multiplexer input, and a second potential output value is transmitted to the second conditional multiplexer output. The conditional multiplexer couples either the first conditional multiplexer input or the second conditional multiplexer input to the conditional multiplexer output, according to an output control command. The output control command is generated by processing a set of arithmetic status-bits through a logical mask. The conditional multiplexer output is coupled to a first processing element output. A first set of arithmetic bits are generated according to the processing of the first processable value. A second set of arithmetic bits may be generated from a second processing operation. The selection of the arithmetic status-bits is performed by an arithmetic-status bit multiplexer selects the desired set of arithmetic status bits from among the first and second set of arithmetic status bits. The conditional multiplexer evaluates the select arithmetic status bits according to logical mask defining an algorithm for evaluating the arithmetic status bits

    Sixteen-channel Multiplexer Final Report

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    Production of 16-channel MOS multiplexer

    Capacity Study of Statistical Multiplexing for IP Telephony

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    Transmitting telephone calls over the Internet causes problems not present in current telephone technology such as packet loss and delay due to queueing in routers. In this undergraduate thesis we study how a Markov modulated Poisson process is applied as an arrival process to a multiplexer and we study the performance in terms of loss probability. The input consists of the superposition of independent voice sources. The predictions of the model is compared with results obtained with simulations of the multiplexer made with a network simulator. The buffer occupancy distribution is also studied and we see how this distribution changes as the load increases
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