Passive and active components development for broadband applications

Recently, GaN HEMTs have been proven to have numerous physical properties, resulting in transistors with greatly increased power densities when compared to the other well-established FET technologies. This advancement spurred research and product development towards power-band applications that require both high power and high efficiency over the wide band. Even though the use of multiple narrow band PAs covering the whole band has invariably led to better performance in terms of efficiency and noise, there is an associated increase in cost and in the insertion loss of the switches used to toggle between the different operating bands. The goal, now, of the new technology is to replace the multiple narrow band PAs with one broadband PA that has a comparable efficiency performance. In our study here, we have investigated a variety of wide band power amplifiers, including class AB PAs and their implementation in distributed and feedback PAs.Additionally, our investigation has included switching-mode PAs as they are well-known for achieving a relatively high efficiency. Besides having a higher efficiency, they are also less susceptible to parameter variations and could impose a lower thermal stress on the transistors than the conventional-mode PAs. With GaN HEMTs, we have demonstrated: a higher than 37 dBm output power and a more than 30% drain efficiency over 0.02 to 3 GHz for the distributed power amplifier; a higher than 30 dBm output power with more than a 22% drain efficiency over 0.1 to 5 GHz for the feedback amplifier; and at least a 43 dBm output power with a higher than 63% drain efficiency over 0.05 to 0.55 GHz for the class D PA. In many communication applications, however, achieving both high efficiency and linearity in the PA design is required. Therefore, in our research, we have evaluated several linearization and efficiency enhancement techniques.We selected the LInear amplification with Nonlinear Components (LINC) approach. Highly efficient combiner and novel efficiency enhancement techniques like the power recycling combiner and adaptive bias LINC schemes have been successfully developed and verified to achieve a combined high efficiency with a relatively high linearity

High Efficiency Microwave Amplifiers and SiC Varactors Optimized for Dynamic Load Modulation

The increasing use of mobile networks as the main source of internet connectivity is creating challenges in the infrastructure. Customer demand is a moving target and continuous hardware developments are necessary to supply higher data rates in an environmentally sustainable and cost effective way. This thesis reviews and advances the status of realizing wideband and high efficiency power amplifiers, which will facilitate improvements in network capacity and energy efficiency. Several demonstrator PAs are proposed, analyzed, designed, and characterized: First, resistive loading at higher harmonics in wideband power amplifier design suitable for envelope tracking (ET) is proposed. A 40 dBm decade bandwidth 0.4–4.1 GHz PA is designed, with 10–15 dB gain and 40–62% drain efficiency. Its versatility is demonstrated by digital pre-distortion (DPD) linearized measurements resulting in adjacent channel leakage ratios (ACLR) lower than −46 dBc for various downlink signals (WCDMA, LTE, WiMAX). Second, a theory for class-J microwave frequency dynamic load modulation (DLM) PAs is derived. This connects transistor technology and load network requirements to enable power-scalable and bandwidth conscious designs. A 38 dBm PA is designed at 2.08 GHz, maintaining efficiencies >45% over 8 dB of output power back-off (OPBO) dynamic range. From this pre-study a fully packaged 86-W peak power version at 2.14 GHz is designed. ACLR after DPD is −46 dBc at a drain efficiency of 34%. For DLM PAs there is a need for varactors with large effective tuning range and high breakdown voltage. For this purpose, SiC Schottky diode varactors are developed with an effective tuning range of 6:1 and supporting a 3:1 tuning ratio at 36 V of RF swing. Nonlinear characterization to enable Q-factor extraction in the presence of distortion is proposed and demonstrated by multi-harmonic active source- and load-pull, offering insights to tunable network design. Third, a method to evaluate and optimize dual-RF input PAs, while catering to higher harmonic conditions and transistor parasitics, is proposed. The method is validated by a PA design having a peak power of 44 +/- 0.9 dBm and 6 dB OPBO PAE exceeding 45% over a 1–3 GHz bandwidth. The results in this thesis contribute with a novel device and analysis of high efficiency and wideband PAs, aiding in the design of key components for future energy efficient and high capacity wireless systems

Envelope Factorization with Partial Elimination and Recombination, EF-PER, a New Linear RF Architecture

In this paper, a new architecture for efficient linear radio frequency transmitters is proposed; it includes envelope-tracking (ET) and envelope-elimination-and-restoration (EER) architectures as special instances. The proposed technique is referred to as Envelope Factorization with Partial Elimination and Recombination (EF-PER). It relies on a decomposition of the RF signal before power amplification as a product of two signals, one of them being the envelope signal elevated to an exponent “α”. Compared to ET or EER architectures, the parameter “α” constitutes a new degree of freedom. This allows one to realize good tradeoffs between different performance criteria such as spectrum use, power efficiency, and transmitter linearity. An intuitive aggregate cost function is introduced to capture the desired tradeoff and turns out to be maximized in α=0.5. The full relevance of EF-PER is sustained both by analytical results and realistic simulations performed for OFDM signals. The EF-PER architecture (with α=0.5) has been simulated under Agilent-ADS with a non-linear transistor model from Avago (E-PHEMT) and compared with ET and EER

Efficiency enhancement techniques for RF and millimeter wave power amplifiers

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.Includes bibliographical references (p. 123-126).Power amplifiers are the circuit blocks in wireless transceivers that require the largest power budget because of their relatively low efficiencies. RF designers cannot depend solely on the development better semiconductor devices in advanced deeply scaled process technologies to obtain improved power amplifier performance. The development of new and better circuits, architectures and design methodologies to maximally exploit the available semiconductor devices is very important as well. This thesis investigates a number of techniques that can be used to improve the efficiency of power amplifiers and break the power-frequency tradeoff in power amplifier design. The first technique emphasizes the use of a class E tuned output network as an efficiency enhancement tool for power amplifiers regardless of their bias conditions. A Class E tuned CMOS power amplifier (PA) operating in the 60 GHz band was designed. Design, layout, and parasitic modeling considerations to attain high-efficiency millimeter-wave PA operation are discussed. Both single-ended and differential versions of the single-stage PA were implemented in a 32 nm SOI CMOS process. Peak power added efficiency of 27% (30%), power gain of 8.8 dB (10 dB), and saturated output power > 9 dBm (12.5 dBm) were measured at 60 GHz from the single-ended (differential) PA with 0.9 V supply. The second technique investigated the efficacy of resistance compression networks in an energy recycling network operating at multi-gigahertz frequencies. The resistance compression network reduces the variation in resonant rectifier input impedance seen at the isolation port of an isolating power combiner. The system was operated at 2.14 GHz and was built around Schottky barrier diodes custom fabricated in a 0.13 [mu]m CMOS process. It is the first experimental demonstration that resistance compression networks can be used for energy recycling in multi-gigahertz applications.by Olumuyiwa Temitope Ogunnika.Ph.D

Amplitude and phase modulation techniques for an asymmetric multi-level outphasing transmitter

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.Includes bibliographical references (p. 93-95).New techniques for improving outphasing transmitters show potential of breaking the traditional linearity-efficiency trade-off by using highly efficient non-linear switching Power Amplifiers (PAs). This work focuses on two of the main building blocks of modem outphasing systems, the power supply switching network and the phase modulator. Both are ubiquitous building blocks in modern RF transceivers, and both are especially critical in Asymmetric Multilevel Outphasing (AMO) systems. A design of the power supply network and control scheme is proposed for an implementation in mm-wave operating frequencies as part of a complete transmitter in 45nm SOI CMOS utilizing four discrete power supplies and achieving data rates of up to 4GS/s. The design includes analysis and simulation of the control signal data path requirements for optimal system operation as well as switch optimization and effects of the driving strength on overall system performance. A new design concept is proposed for a phase modulator utilizing the phase shifthing capabilities of a resonant tank and the ability to seperately control the circuit properties via its components. A prototype in 65nm CMOS achieves 12 bits of resolution, with an Effective Number Of Bits (ENOB) of 10.2 bits and very fast settling time of less than 5 carrier cycles. The chip is also tested as a stand alone transmitter showing an EVM of less than 5% for 8-PSK modulation at maximum data rate, meeting the requirements for operation at the Medical Implant Communication Services (MICS) band.by Gilad Yahalom.S.M

Techniques for high-efficiency outphasing power amplifiers

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.Cataloged from PDF version of thesis.Includes bibliographical references (p. 171-177).A trade-off between linearity and efficiency exists in conventional power amplifiers (PAs). The outphase amplifying concept overcomes this trade-off by enabling the use of high efficiency, non-linear power amplifiers for linear amplification. However, the efficiency improvement is limited by the efficiency of the output power combiner. This thesis investigates techniques to overcome this efficiency limit while maintaining sufficient linearity. Two techniques are proposed. The first technique is called the outphasing energy recovery amplifier (OPERA), which recovers the normally wasted power back to the power supply and utilizes a resistance compression network for improved linearity. A 48-MHz, 20-W prototype OPERA system was built which demonstrates more than 2x higher efficiency than the standard outphasing system for a 16-QAM signal. The second technique to improve the efficiency of the outphasing system is asymmetric multilevel outphasing (AMO) modulation. In the AMO system, the amplitude for each of the two outphased PAs can switch independently among multiple discrete levels, significantly reducing the energy lost in the power combiner. Three different AMO prototypes were built, each of which demonstrate between 2x-3x efficiency improvement compared to the standard outphasing system. A 2.4-GHz, 500- mW prototype made in a 65-nm CMOS process achieves an average system efficiency of 28.7% for a 20-MHz 64-QAM signal. To the author's best knowledge, this is the highest reported efficiency for a CMOS PA in the 2-2.7 GHz range for signal bandwidths greater than 10 MHz.by Philip Andrew Godoy.Ph.D