17,269 research outputs found

    Multilevel Runtime Verification for Safety and Security Critical Cyber Physical Systems from a Model Based Engineering Perspective

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    Advanced embedded system technology is one of the key driving forces behind the rapid growth of Cyber-Physical System (CPS) applications. CPS consists of multiple coordinating and cooperating components, which are often software-intensive and interact with each other to achieve unprecedented tasks. Such highly integrated CPSs have complex interaction failures, attack surfaces, and attack vectors that we have to protect and secure against. This dissertation advances the state-of-the-art by developing a multilevel runtime monitoring approach for safety and security critical CPSs where there are monitors at each level of processing and integration. Given that computation and data processing vulnerabilities may exist at multiple levels in an embedded CPS, it follows that solutions present at the levels where the faults or vulnerabilities originate are beneficial in timely detection of anomalies. Further, increasing functional and architectural complexity of critical CPSs have significant safety and security operational implications. These challenges are leading to a need for new methods where there is a continuum between design time assurance and runtime or operational assurance. Towards this end, this dissertation explores Model Based Engineering methods by which design assurance can be carried forward to the runtime domain, creating a shared responsibility for reducing the overall risk associated with the system at operation. Therefore, a synergistic combination of Verification & Validation at design time and runtime monitoring at multiple levels is beneficial in assuring safety and security of critical CPS. Furthermore, we realize our multilevel runtime monitor framework on hardware using a stream-based runtime verification language

    Efficient Simulation of Structural Faults for the Reliability Evaluation at System-Level

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    In recent technology nodes, reliability is considered a part of the standard design ¿ow at all levels of embedded system design. While techniques that use only low-level models at gate- and register transfer-level offer high accuracy, they are too inefficient to consider the overall application of the embedded system. Multi-level models with high abstraction are essential to efficiently evaluate the impact of physical defects on the system. This paper provides a methodology that leverages state-of-the-art techniques for efficient fault simulation of structural faults together with transaction-level modeling. This way it is possible to accurately evaluate the impact of the faults on the entire hardware/software system. A case study of a system consisting of hardware and software for image compression and data encryption is presented and the method is compared to a standard gate/RT mixed-level approac

    A metaobject architecture for fault-tolerant distributed systems : the FRIENDS approach

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    The FRIENDS system developed at LAAS-CNRS is a metalevel architecture providing libraries of metaobjects for fault tolerance, secure communication, and group-based distributed applications. The use of metaobjects provides a nice separation of concerns between mechanisms and applications. Metaobjects can be used transparently by applications and can be composed according to the needs of a given application, a given architecture, and its underlying properties. In FRIENDS, metaobjects are used recursively to add new properties to applications. They are designed using an object oriented design method and implemented on top of basic system services. This paper describes the FRIENDS software-based architecture, the object-oriented development of metaobjects, the experiments that we have done, and summarizes the advantages and drawbacks of a metaobject approach for building fault-tolerant system

    Analytical Evaluation of Energy and Throughput for Multilevel Caches

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    With the increase of processor-memory performance gap, it has become important to gauge the performance of cache architectures so as to evaluate their impact on energy requirement and throughput of the system. Multilevel caches are found to be increasingly prevalent in the high-end processors. Additionally, the recent drive towards multicore systems has necessitated the use of multilevel cache hierarchies for shared memory architectures. This paper presents simplified and accurate mathematical models to estimate the energy consumption and the impact on throughput for multilevel caches for single core systems

    Secure Autonomous UAVs Fleets by Using New Specific Embedded Secure Elements

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    Multiparty multilevel watermarking protocol for digital secondary market based on iris recognition technology

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    Background: In order to design secure digital right management architecture between different producers and different consumers, this paper proposes a multiparty and multilevel watermarking protocol for primary and secondary market. Comparing with the traditional buyer-seller watermarking protocols, this paper makes several outstanding achievements. Method: First of all, this paper extends traditional buyer-seller two-party architecture to multiparty architecture which contains producer, multiply distributors, consumers, etc. Secondly, this paper pays more attention on the security issues, for example, this paper applies iris recognition technology as an advanced security method. Conclusion: Finally, this paper also presents a second-hand market scheme to overcome the copyright issues that may happen in the real world. © 2017 Bentham Science Publishers

    A Review on Software Architecture Optimization Methods

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    Due to the remarkable mechanical request for programming frameworks, the expansion of the uncertainty, the quality requirements and quality of testing, the programming engineering configuration has been transformed into essential progression movement and the examination site is developing rapidly. In the recent decades, programming engineering involves improved technologies, which means to organize a scan for design outline for an arrangement of value attributes, have multiplied. In any case, the results shown are divided into different research groups, many framework areas and different quality features. Coming about the inclusion of current research, we have played a well-structured writing survey and have broken the result of various check-sheets of different research groups. Considering this study, a scientific classification has been done which is used for current research. Apart from this, the effective investigation of the examination writing given in this audit is expected to help in exploration and merging the current research endeavors and inferring an examination plan for future advancements
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