Quantum Enhancement of a S/D Tunneling Model in a 2D MS-EMC Nanodevice Simulator: NEGF Comparison and Impact of Effective Mass Variation

As complementary metal-oxide-semiconductor (CMOS) transistors approach the nanometer scale, it has become mandatory to incorporate suitable quantum formalism into electron transport simulators. In this work, we present the quantum enhancement of a 2D Multi-Subband Ensemble Monte Carlo (MS-EMC) simulator, which includes a novel module for the direct Source-to-Drain tunneling (S/D tunneling), and its verification in the simulation of Double-Gate Silicon-On-Insulator (DGSOI) transistors and FinFETs. Compared to ballistic Non-Equilibrium Green’s Function (NEGF) simulations, our results show accurate I D vs. V GS and subthreshold characteristics for both devices. Besides, we investigate the impact of the effective masses extracted Density Functional Theory (DFT) simulations, showing that they are the key of not only the general thermionic emission behavior of simulated devices, but also the electron probability of experiencing tunneling phenomena.This project has received funding from EPSRC UKRI Innovation Fellowship scheme under grant agreement No. EP/S001131/1 (QSEE) and No. EP/P009972/1 (QUANTDEVMOD)

MS-EMC vs. NEGF: A comparative study accounting for transport quantum corrections

As electronic devices approach the nanometer scale, quantum transport theories have been recognized as the best option to reproduce their performance. Other possible trend, mainly focused on reducing the computational effort, is the inclusion of quantum effects in semi-classical simulators. This work presents a comparison between a NEGF simulator and a MS-EMC tool including S/D tunneling both applied on a DGSOI transistor

Analysis of the Reformulated Source to Drain Tunneling Probability for Improving the Accuracy of a Multisubband Ensemble Monte Carlo Simulator

This research was founded by the Juan de la Cierva Incorporación Fellowship scheme under grant agreement IJC2019-040003-I (MICINN/AEI) and by MCIN/AEI/10.13039/501100011033 grant number PID2020-119668GB-I00.As an attempt to improve the description of the tunneling current that arises in ultrascaled nanoelectronic devices when charge carriers succeed in traversing the potential barrier between source and drain, an alternative and more accurate non-local formulation of the tunneling probability was suggested. This improvement of the probability computation might result of particular interest in the context of Monte Carlo simulations where the utilization of the conventional Wentzel-Kramers-Brillouin (WKB) approximation tends to overestimate the number of particles experiencing this type of direct tunneling. However, in light of the reformulated expression for the tunneling probability, it becomes of paramount importance to assess the type of potentials for which it behaves adequately. We demonstrate that, for ensuring boundedness, the top of the potential barrier cannot feature a plateau, but rather has to behave quadratically as one approaches its maximum. Moreover, we show that monotonicity of the reformulated tunneling probability is not guaranteed by boundedness and requires an additional constraint regarding the derivative of the prefactor that modifies the traditional WKB tunneling probabilityJuan de la Cierva Incorporación IJC2019-040003-IMinisterio de Ciencia e Innovación MCIN/AEI/10.13039/501100011033, PID2020-119668GB-I0

Self-Consistent Enhanced S/D Tunneling Implementation in a 2D MS-EMC Nanodevice Simulator

The implementation of a source to drain tunneling in ultrascaled devices using MS-EMC has traditionally led to overestimated current levels in the subthreshold regime. In order to correct this issue and enhance the capabilities of this type of simulator, we discuss in this paper two alternative and self-consistent solutions focusing on different parts of the simulation flow. The first solution reformulates the tunneling probability computation by modulating the WKB approximation in a suitable way. The second corresponds to a change in the current calculation technique based on the utilization of the Landauer formalism. The results from both solutions are compared and contrasted to NEGF results from NESS. We conclude that the current computation modification constitutes the most suitable and advisable strategy to improve the MS-EMC tool.Spanish Ministry of Economy, Industry and Competitivity under grant TEC2017-89800-REPSRC UKRI Innovation Fellowship scheme under grant agreement No. EP/S001131/1 (QSEE)Juan de la Cierva Incorporación Fellowship scheme under grant agreement No. IJC2019-040003-I (MICINN/AEI

Monte Carlo study of current variability in UTB SOI DG MOSFETs

The scaling of conventional silicon based MOSFETs is increasingly difficult into the nanometer regime due to short channel effects, tunneling and subthreshold leakage current. Ultra-thin body silicon-on-insulator based architectures offer a promising alternative, alleviating these problems through their geometry. However, the transport behaviour in these devices is more complex, especially for silicon thicknesses below 10 nm, with enhancement from band splitting and volume inversion competing with scattering from phonons, Coulomb interactions, interface roughness and body thickness fluctuation. Here, the effect of the last scattering mechanism on the drive current is examined as it is considered a significant limitation to device performance for body thicknesses below 5 nm. A simulation technique that properly captures non-equilibrium transport, includes quantum effects and maintains computational efficiency is essential for the study of this scattering mechanism. Therefore, a 3D Monte Carlo simulator has been developed which includes this scattering effect in an ab initio fashion, and quantum corrections using the Density Gradient formalism. Monte Carlo simulations using `frozen field' approximation have been carried out to examine the dependence of mobility on silicon thickness in large, self averaging devices. This approximation is then used to carry out statistical studies of uniquely different devices to examine the variability of on-current. Finally, Monte Carlo simulations self consistent with Poisson's equation have been carried out to further investigate this mechanism

Quantum corrected full-band semiclassical Monte Carlo simulation research of charge transport in Si, stressed-Si, and SiGe MOSFETs

This Ph.D. research is centered around a full-band Monte Carlo device simulator (“Monte Carlo at the University of Texas”, MCUT) with quantum corrections (based on one-dimensional Schrödinger equation solver). The code itself was based on a solid infrastructure of a Monte Carlo simulator, “MoCa” from the University of Illinois at Urbana-Champaign. To that there were added new methods and features during my Ph.D. program, including strained band structures, alternative (to conventional 100 ) surface orientations, full-band scattering mechanisms, and valley-dependent quantum correction. These features enable “MCUT” to be used to model various strained and/or alloyed silicon MOSFETs, as well as the MOSFETs composed of alternative materials such as Ge, in sub-100 nm regime. Monte Carlo simulation, itself, handles short channel effects and hot carriers in ultra small device well; full-band structure replaces the inaccurate and unknown (for new/strained materials) analytical formulae; and the quantum corrections approximate quantum-confinement effects on device performance. The goal is to understand and predict the device behavior of the so called “non-classical” CMOS ― beyond bulk Si based CMOS ― in the sub-100 nm regime.Electrical and Computer Engineerin

Modeling nanoscale quasi-ballistic MOS transistors:a circuit design perspective

The scaling of device technologies poses new challenges, not only in circuit design, but also in device modeling, especially because of the short-channel effects and the emergence of novel phenomena like ballistic transport. Nonetheless, it enables the design of ultra low-power analog and Radio Frequency (RF) circuits by allowing to push the operating points intomoderate and eventually weak inversion regions, which are increasingly becoming the preferred regions of operation for such applications. Even though modern compact models have evolved to adequately model the short-channel effects in all regions of operation, there is a lack of simpler models that (a) reliably predict the physics of downscaled devices while (b) remaining continuous through moderate inversion and (c) aid the designer’s intuition through simple designmethodologies. In this work, we extend the EKV charge based model to include the velocity saturation effect for weak inversion operation. Using the simple analytical model hence developed, we propose a design methodology for low-power analog circuit design. Then, we focus our attention on ballistic transport in MOSFETs, that is expected to dominate in the deeply scaled devices. Again, despite the extensive body of work available in the literature, most models remain deeply rooted in physics, consisting of fairly complicated equations, that are of little use for an intuitive understanding and design. In addition, the quasi-ballistic devices, which lie on the continuumbetween the ballistic and the diffusive devices, pose their own modeling challenges: a model for the quasi-ballistic devices would have to remain continuous between the ballistic and diffusive regimes. Most of the published works, based on the carrier flux transport over the source-channel potential barrier approach, seem to ignore the electrostatics in the rest of the channel. The shape of the electrostatic potential in the channel is approximated through polynomial functions, which is adequate for the very short-channel devices but not scalable to long channel quasi-ballistic devices. In this work, we study the role of the gate and the electrostatics in a ballistic channel by drawing on the insights gained from Monte-Carlo simulations on quasi-ballistic and ballistic doublegate MOSFETs. We propose a simple semi-empirical model of the channel charge, using which we develop an analytical model for the channel potential, both of which could be used as precursors to a scalable compact model that would encompass the ballistic, quasi-ballistic and drift-diffusion regimes

Miniaturized Transistors, Volume II

In this book, we aim to address the ever-advancing progress in microelectronic device scaling. Complementary Metal-Oxide-Semiconductor (CMOS) devices continue to endure miniaturization, irrespective of the seeming physical limitations, helped by advancing fabrication techniques. We observe that miniaturization does not always refer to the latest technology node for digital transistors. Rather, by applying novel materials and device geometries, a significant reduction in the size of microelectronic devices for a broad set of applications can be achieved. The achievements made in the scaling of devices for applications beyond digital logic (e.g., high power, optoelectronics, and sensors) are taking the forefront in microelectronic miniaturization. Furthermore, all these achievements are assisted by improvements in the simulation and modeling of the involved materials and device structures. In particular, process and device technology computer-aided design (TCAD) has become indispensable in the design cycle of novel devices and technologies. It is our sincere hope that the results provided in this Special Issue prove useful to scientists and engineers who find themselves at the forefront of this rapidly evolving and broadening field. Now, more than ever, it is essential to look for solutions to find the next disrupting technologies which will allow for transistor miniaturization well beyond silicon’s physical limits and the current state-of-the-art. This requires a broad attack, including studies of novel and innovative designs as well as emerging materials which are becoming more application-specific than ever before

Cutting Edge Nanotechnology

The main purpose of this book is to describe important issues in various types of devices ranging from conventional transistors (opening chapters of the book) to molecular electronic devices whose fabrication and operation is discussed in the last few chapters of the book. As such, this book can serve as a guide for identifications of important areas of research in micro, nano and molecular electronics. We deeply acknowledge valuable contributions that each of the authors made in writing these excellent chapters

Journal of Telecommunications and Information Technology, 2009, nr 4

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