2,221 research outputs found
Complexity classifications for different equivalence and audit problems for Boolean circuits
We study Boolean circuits as a representation of Boolean functions and
consider different equivalence, audit, and enumeration problems. For a number
of restricted sets of gate types (bases) we obtain efficient algorithms, while
for all other gate types we show these problems are at least NP-hard.Comment: 25 pages, 1 figur
Synchronization of Coupled Nonidentical Genetic Oscillators
The study on the collective dynamics of synchronization among genetic
oscillators is essential for the understanding of the rhythmic phenomena of
living organisms at both molecular and cellular levels. Genetic oscillators are
biochemical networks, which can generally be modelled as nonlinear dynamic
systems. We show in this paper that many genetic oscillators can be transformed
into Lur'e form by exploiting the special structure of biological systems. By
using control theory approach, we provide a theoretical method for analyzing
the synchronization of coupled nonidentical genetic oscillators. Sufficient
conditions for the synchronization as well as the estimation of the bound of
the synchronization error are also obtained. To demonstrate the effectiveness
of our theoretical results, a population of genetic oscillators based on the
Goodwin model are adopted as numerical examples.Comment: 16 pages, 3 figure
Distributed classifier based on genetically engineered bacterial cell cultures
We describe a conceptual design of a distributed classifier formed by a
population of genetically engineered microbial cells. The central idea is to
create a complex classifier from a population of weak or simple classifiers. We
create a master population of cells with randomized synthetic biosensor
circuits that have a broad range of sensitivities towards chemical signals of
interest that form the input vectors subject to classification. The randomized
sensitivities are achieved by constructing a library of synthetic gene circuits
with randomized control sequences (e.g. ribosome-binding sites) in the front
element. The training procedure consists in re-shaping of the master population
in such a way that it collectively responds to the "positive" patterns of input
signals by producing above-threshold output (e.g. fluorescent signal), and
below-threshold output in case of the "negative" patterns. The population
re-shaping is achieved by presenting sequential examples and pruning the
population using either graded selection/counterselection or by
fluorescence-activated cell sorting (FACS). We demonstrate the feasibility of
experimental implementation of such system computationally using a realistic
model of the synthetic sensing gene circuits.Comment: 31 pages, 9 figure
Improving the Asymmetric TSP by Considering Graph Structure
Recent works on cost based relaxations have improved Constraint Programming
(CP) models for the Traveling Salesman Problem (TSP). We provide a short survey
over solving asymmetric TSP with CP. Then, we suggest new implied propagators
based on general graph properties. We experimentally show that such implied
propagators bring robustness to pathological instances and highlight the fact
that graph structure can significantly improve search heuristics behavior.
Finally, we show that our approach outperforms current state of the art
results.Comment: Technical repor
Fuzzy Logic and VLSI Testing
A new application of Fuzzy logic (FL), in the context of test vector generation in VLSI testing is presented. Fuzzification of the threshold value simulation (TVS) approach and setting up of mathematical concepts are carried out in terms of a hierarchy of membership functions. The test-vectors are found by optimising a suitable membership function. The Fuzzy model besides giving a different mathematical basis, also helps in defining new and better optimising functions, thus provind its utility. The concepts outlined in this paper, though demonstrated on toy model of a circuit consisting of only AND gates, can easily be extended to circuits with other logic gates
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