Multi-Granular Optical Cross-Connect: Design, Analysis, and Demonstration

A fundamental issue in all-optical switching is to offer efficient and cost-effective transport services for a wide range of bandwidth granularities. This paper presents multi-granular optical cross-connect (MG-OXC) architectures that combine slow (ms regime) and fast (ns regime) switch elements, in order to support optical circuit switching (OCS), optical burst switching (OBS), and even optical packet switching (OPS). The MG-OXC architectures are designed to provide a cost-effective approach, while offering the flexibility and reconfigurability to deal with dynamic requirements of different applications. All proposed MG-OXC designs are analyzed and compared in terms of dimensionality, flexibility/reconfigurability, and scalability. Furthermore, node level simulations are conducted to evaluate the performance of MG-OXCs under different traffic regimes. Finally, the feasibility of the proposed architectures is demonstrated on an application-aware, multi-bit-rate (10 and 40 Gbps), end-to-end OBS testbed

Electronic and photonic switching in the atm era

Broadband networks require high-capacity switches in order to properly manage large amounts of traffic fluxes. Electronic and photonic technologies are being used to achieve this objective both allowing different multiplexing and switching techniques. Focusing on the asynchronous transfer mode (ATM), the inherent different characteristics of electronics and photonics makes different architectures feasible. In this paper, different switching structures are described, several ATM switching architectures which have been recently implemented are presented and the implementation characteristics discussed. Three diverse points of view are given from the electronic research, the photonic research and the commercial switches. Although all the architectures where successfully tested, they should also follow different market requirements in order to be commercialised. The characteristics are presented and the architectures projected over them to evaluate their commercial capabilities.Peer ReviewedPostprint (published version

Architecture, design, and modeling of the OPSnet asynchronous optical packet switching node

An all-optical packet-switched network supporting multiple services represents a long-term goal for network operators and service providers alike. The EPSRC-funded OPSnet project partnership addresses this issue from device through to network architecture perspectives with the key objective of the design, development, and demonstration of a fully operational asynchronous optical packet switch (OPS) suitable for 100 Gb/s dense-wavelength-division multiplexing (DWDM) operation. The OPS is built around a novel buffer and control architecture that has been shown to be highly flexible and to offer the promise of fair and consistent packet delivery at high load conditions with full support for quality of service (QoS) based on differentiated services over generalized multiprotocol label switching

Diluting the Scalability Boundaries: Exploring the Use of Disaggregated Architectures for High-Level Network Data Analysis

Traditional data centers are designed with a rigid architecture of fit-for-purpose servers that provision resources beyond the average workload in order to deal with occasional peaks of data. Heterogeneous data centers are pushing towards more cost-efficient architectures with better resource provisioning. In this paper we study the feasibility of using disaggregated architectures for intensive data applications, in contrast to the monolithic approach of server-oriented architectures. Particularly, we have tested a proactive network analysis system in which the workload demands are highly variable. In the context of the dReDBox disaggregated architecture, the results show that the overhead caused by using remote memory resources is significant, between 66\% and 80\%, but we have also observed that the memory usage is one order of magnitude higher for the stress case with respect to average workloads. Therefore, dimensioning memory for the worst case in conventional systems will result in a notable waste of resources. Finally, we found that, for the selected use case, parallelism is limited by memory. Therefore, using a disaggregated architecture will allow for increased parallelism, which, at the same time, will mitigate the overhead caused by remote memory.Comment: 8 pages, 6 figures, 2 tables, 32 references. Pre-print. The paper will be presented during the IEEE International Conference on High Performance Computing and Communications in Bangkok, Thailand. 18 - 20 December, 2017. To be published in the conference proceeding

Multistage Switching Architectures for Software Routers

Software routers based on personal computer (PC) architectures are becoming an important alternative to proprietary and expensive network devices. However, software routers suffer from many limitations of the PC architecture, including, among others, limited bus and central processing unit (CPU) bandwidth, high memory access latency, limited scalability in terms of number of network interface cards, and lack of resilience mechanisms. Multistage PC-based architectures can be an interesting alternative since they permit us to i) increase the performance of single software routers, ii) scale router size, iii) distribute packet manipulation and control functionality, iv) recover from single-component failures, and v) incrementally upgrade router performance. We propose a specific multistage architecture, exploiting PC-based routers as switching elements, to build a high-speed, largesize,scalable, and reliable software router. A small-scale prototype of the multistage router is currently up and running in our labs, and performance evaluation is under wa

Shared-per-wavelength asynchronous optical packet switching: A comparative analysis

Cataloged from PDF version of article.This paper compares four different architectures for sharing wavelength converters in asynchronous optical packet switches with variable-length packets. The first two architectures are the well-known shared-per-node (SPN) and shared-per-link (SPL) architectures, while the other two are the shared-per-input-wavelength (SPIW) architecture, recently proposed as an optical switch architecture in synchronous context only, which is extended here to the asynchronous scenario, and an original scheme called shared-per-output-wavelength (SPOW) architecture that we propose in the current article. We introduce novel analytical models to evaluate packet loss probabilities for SPIW and SPOW architectures in asynchronous context based on Markov chains and fixed-point iterations for the particular scenario of Poisson input traffic and exponentially distributed packet lengths. The models also account for unbalanced traffic whose impact is thoroughly studied. These models are validated by comparison with simulations which demonstrate that they are remarkably accurate. In terms of performance, the SPOW scheme provides blocking performance very close to the SPN scheme while maintaining almost the same complexity of the space switch, and employing less expensive wavelength converters. On the other hand, the SPIW scheme allows less complexity in terms of number of optical gates required, while it substantially outperforms the widely accepted SPL scheme. The authors therefore believe that the SPIW and SPOW schemes are promising alternatives to the conventional SPN and SPL schemes for the implementation of next-generation optical packet switching systems. 2010 Elsevier B.V. All rights reserved

Multi-stage switching networks for waveguide optical technology

Multi-stage switching is very suitable for implementing interconnection systems operating at different physical scale (from rack-to-rack to on-chip) and with several technologies (either photonics or electronics). Several multistage architectures have been proposed to design these systems in a highly modular and efficient way. Since these proposals are general and applicable to a vast range of technologies, optimizations are possible once a specific technology is considered. In this work, we aim at optimizing multi-stage banyan and EGS architectures in case of optical waveguide technology implementation. We propose a method to decrease the number of waveguide crossovers, while avoiding an excessive increase of waveguide bends