Variable-Angle Phase-Shifted PWM for Multilevel Three-Cell Cascaded H-bridge Converters

Multilevel cascaded H-bridge converters have become a mature technology for applications where high-power medium ac voltages are required. Normal operation of multilevel cascaded H-bridge converters assumes that all power cells have the same dc voltage, and each power cell generates the same voltage averaged over a sampling period using a conventional phase-shifted pulse width modulation (PWM) technique. However, this modulation method does not achieve good results under unbalanced operation per H-bridge in the power converter, which may happen in grid-connected applications such as photovoltaic or battery energy storage systems. In the paper, a simplified mathematical analysis of the phase-shifted PWM technique is presented. In addition, a modification of this conventional modulation method using variable shift angles between the power cells is introduced. This modification leads to the elimination of harmonic distortion of low-order harmonics due to the switching (triangular carrier frequency and its multiples) even under unbalanced operational conditions. The analysis is particularized for a three-cell cascaded H-bridge converter, and experimental results are presented to demonstrate the good performance of the proposed modulation method

Design and Hardware Implementation Considerations of Modified Multilevel Cascaded H-Bridge Inverter for Photovoltaic System

Inverters are an essential part in many applications including photovoltaic generation. With the increasing penetration of renewable energy sources, the drive for efficient inverters is gaining more and more momentum. In this paper, output power quality, power loss, implementation complexity, cost, and relative advantages of the popular cascaded multilevel H-bridge inverter and a modified version of it are explored. An optimal number of levels and the optimal switching frequency for such inverters are investigated, and a five-level architecture is chosen considering the trade-offs. This inverter is driven by level shifted in-phase disposition pulse width modulation technique to reduce harmonics, which is chosen through deliberate testing of other advanced disposition pulse width modulation techniques. To reduce the harmonics further, the application of filters is investigated, and an LC filter is applied which provided appreciable results. This system is tested in MATLAB/Simulink and then implemented in hardware after design and testing in Proteus ISIS. The general cascaded multilevel H-bridge inverter design is also implemented in hardware to demonstrate a novel low-cost MOSFET driver build for this study. The hardware setups use MOSFETs as switching devices and low-cost ATmega microcontrollers for generating the switching pulses via level shifted in-phase disposition pulse width modulation. This implementation substantiated the effectiveness of the proposed design

Multilevel Converters: An Enabling Technology for High-Power Applications

| Multilevel converters are considered today as the state-of-the-art power-conversion systems for high-power and power-quality demanding applications. This paper presents a tutorial on this technology, covering the operating principle and the different power circuit topologies, modulation methods, technical issues and industry applications. Special attention is given to established technology already found in industry with more in-depth and self-contained information, while recent advances and state-of-the-art contributions are addressed with useful references. This paper serves as an introduction to the subject for the not-familiarized reader, as well as an update or reference for academics and practicing engineers working in the field of industrial and power electronics.Ministerio de Ciencia y Tecnología DPI2001-3089Ministerio de Eduación y Ciencia d TEC2006-0386

A Reduced Power Switches Count Multilevel Converter-Based Photovoltaic System with Integrated Energy Storage

A multilevel topology for photovoltaic (PV) systems with integrated energy storage (ES) is presented in this article. Both PV and ES power cells are connected in series to form a dc link, which is then connected to an H-bridge to convert the dc voltage to an ac one. The main advantage of the proposed converter compared to the cascaded-H-bridge (CHB) converter, as well as compared to the available multilevel topologies, is that fewer semiconductor devices are needed here. As the output voltage levels increase, more switches are saved, which results in a more efficient, cheaper, and smaller converter. So far, there is still no modulation strategy that is designed particularly for PV-fed multilevel converters with built-in ES. The standard modulations are impractical for such an application since they suffer from deficiencies, such as polluted output signals - thus, requiring larger output filter - and overmodulation. A modified modulation strategy for PV+ES multilevel inverters is, therefore, introduced in this article. The proposal has been simulated and experimentally validated to evaluate its effectiveness, where it has been shown that the proposed topology is not exclusively feasible, but also suffers from less conduction and switching loss, achieving higher efficiency with respect to its counterpart CHB. </p

Grid-Connected Single-Star Bridge-Cells Modular Multilevel Cascaded Converter with Selective Harmonic Elimination Techniques

Nowadays, Renewable Energy Sources (RESs) are receiving enormous attention due to the noticeable exhaustion of fossil fuel and its emission of greenhouse gases. DC-AC converters have attracted the attention of the researchers, as they are entailed to integrate RESs to the grid to comply with the grid frequency and voltage requirements. Due to the high penetration of RESs, especially with elevated power levels, high-power converters are needed, which necessitates higher voltage and current ratings of the semiconductor devices. The unavailability of high voltage semiconductor devices has directed the attention to the use of either series connection of semiconductor devices or Multilevel Inverters (MLIs). MLIs allow using several low rated semiconductors to hold the high output power of the inverter. The MLI output waveform is close to sinusoidal in nature, therefore it may require a small filter to enhance the output power quality. There are many types of MLIs, where the most common MLIs are Flying Capacitor, Diode Clamped, and Modular Multilevel Cascaded Converter (MMCC). The MMCC can be classified into three main formations, the Single-Star Bridge-Cells MMCC (SSBC-MMCC), the Double-Star Bridge-Cells MMCC (DSBC-MMCC), and the Double-Star Chopper-Cells MMCC (DSCC-MMCC). The main advantage of the MMCC is the modularity and scalability. In addition, the MMCC does not require any clamping diodes or flying capacitors for clamping the voltage across the switches. In this thesis, the MMCC will be used to integrate high-power RESs to Grid. Nevertheless, the high-power applications necessitate low switching frequency operations. One of the most common controlling techniques of MLI with low frequency operation is the Selective Harmonic Elimination (SHE). SHE insures also the output current Total Harmonic Distortion (THD) to be minimized. One disadvantage of the SHE method is that the complexity of the algorithm along with the equations used is increased by the increase of the MMCC number of levels. Therefore, other alternatives of SHE techniques will be studied in this work to overcome this complexity. This thesis focuses typically on MMCC, particularly the SSBC-MMCC. In this work, a high-power grid-connected SSBC-MMCC is controlled with three different SHE techniques, complying with low switching frequency operation limitation in high-power applications. In addition to the Conventional SHE (C-SHE) technique, Quasi-SHE (Q-SHE) and Asymmetrical-SHE (A-SHE) approaches are proposed and assessed. Q-SHE and A-SHE approaches are based on eliminating selected low order harmonics (for instance, eliminating the fifth and seventh order harmonics), irrelevant to the number of employed levels provided that the number of levels allows for the required harmonic elimination. Compared with the C-SHE approach, the Q-SHE and A-SHE require less computational burden in solving the required equation groups, especially when a high number of levels and/or multiple switching angles for each voltage level are needed, while maintaining the same dv/dt of the output voltage. A 5MW, 17-level, grid-connected SSBC-MMCC, controlled in the synchronous rotating reference frame, is employed for assessing the addressed SHE techniques. The assessment is validated through simulation results using Matlab/Simulink platform

Dead-time impact on the harmonic distortion and conversion efficiency in a three-phase five-level Cascaded H-Bridge inverter: mathematical formulation and experimental analysis

To avoid leg short-circuit in inverters, dead time must be introduced on leg gate signals. Dead time affects the inverter output voltage fundamental harmonic amplitude, voltage harmonic distortion and inverter efficiency by introducing additional voltage drops. In this regard, dead time effects have been widely investigated for traditional two-level three-phase voltage source inverters in the literature but not extensively for multilevel topology structures. This paper provides a detailed analysis of dead time impact on the harmonic distortion and efficiency of Cascaded H-Bridges Multilevel Inverters (CHBMIs). For this purpose, a general mathematical formulation to determine voltage drop due to dead time effects, also taking into account the adopted Multicarrier PWM strategy, has been provided and experimentally validated for a five-level three-phase CHBMI structure. As a comparison tool between expected and ideal inverter output voltage, the percentage voltage error e% is introduced. In most of the cases, e% is lower than 5%, and it starts increasing for very low amplitude modulation index or for specific working points where nonlinearities occur. Furthermore, several experimental investigations have been carried out to evaluate the CHBMI performance in terms of harmonic distortion and efficiency by changing, the values of dead time, modulation index and switching frequency for ten different multi-carried PWM strategies. Experimental results confirm the strong dependency between the dead time impact on the converter performance and the adopted Multi Carrier-PWM (MC-PWM) strategy: as a way of example, converter efficiency can be reduced from 80% to 60% when dead time is increased from 0.5 μs to 1.5 μs and Phase Shifted-PWM (PS-PWM) is adopted

Switching Frequency Effects on the Efficiency and Harmonic Distortion in a Three-Phase Five-Level CHBMI Prototype with Multicarrier PWM Schemes: Experimental Analysis

The current climatic scenario requires the use of innovative solutions to increase the production of electricity from renewable energy sources. Multilevel Power Inverters are a promising solution to improve the penetration of renewable energy sources into the electrical grid. Moreover, the performance of MPIs is a function of the modulation strategy employed and of its features (modulation index and switching frequency). This paper presents an extended and experimental analysis of three-phase five-level Cascaded H-Bridges Multilevel Inverter performance in terms of efficiency and harmonic content considering several MC PWM modulation strategies. In detail, the CHBMI performance is analyzed by varying the modulation index and the switching frequency. For control purposes, the NI System On Module sbRIO-9651 control board, a dedicated FPGA-based control board for power electronics and drive applications programmable in the LabVIEW environment, is used. The paper describes the modulation strategies implementation, the test bench set-up, and the experimental investigations carried out. The results obtained in terms of Total Harmonic Distorsion (THD) and efficiency are analyzed, compared, and discussed

A comprehensive review on modular multilevel converters, submodule topologies, and modulation techniques

The concept of the modular multilevel converter (MLC) has been raising interest in research in order to improve their performance and applicability. The potential of an MLC is enormous, with a great focus on medium- and high-voltage applications, such as solar photovoltaic and wind farms, electrified railway systems, or power distribution systems. This concept makes it possible to overcome the limitation of the semiconductors blocking voltages, presenting advantageous characteristics. However, the complexity of implementation and control presents added challenges. Thus, this paper aims to contribute with a critical and comparative analysis of the state-of-the-art aspects of this concept in order to maximize its potential. In this paper, different power electronics converter topologies that can be integrated into the MLC concept are presented, highlighting the advantages and disadvantages of each topology. Nevertheless, different modulation techniques used in an MLC are also presented and analyzed. Computational simulations of all the modulation techniques under analysis were developed, based on four cascaded full-bridge topologies. Considering the simulation results, a comparative analysis was possible to make regarding the symmetry of the synthesized waveforms, the harmonic content, and the power distribution in each submodule constituting the MLC.This work has been supported by FCT—Fundação para a Ciência e Tecnologia, within the R&D Units Project Scope UIDB/00319/2020. Mr. Luis A. M. Barros is supported by the doctoral scholarship PD/BD/143006/2018, granted by the Portuguese FCT foundation

Cascaded Multilevel PV Inverter with Improved Harmonic Performance During Power Imbalance Between Power Cells

The difference in power cell irradiances in cascaded multilevel converters results in different duty cycles among those cells when maintaining the maximum power point tracking (MPPT). However, the difference in cell duty cycles is undesired since it is proportional to the output voltage and current distortions. To this regard, a multilevel topology for photovoltaic (PV) applications is proposed, where an H6 bridge power cell is used instead of an H-bridge one. In case of solar irradiance mismatch among the power cells, the proposed converter injects power with lower voltage from the shaded cells without altering the PV voltage; hence maintaining the MPPT operation. This modification allows us to retain an equal duty cycle in all the power cells whatever the meteorological conditions are present; consequently, maintaining good output voltage and current waveform qualities. To test the effectiveness of the proposed solution, a detailed simulation model as well as an experimental prototype is built. The obtained results show that the proposed topology provides significantly improved output voltage and current qualities compared to the cascaded H-bridge one. The performance of the proposed topology compared to one offering improved harmonics performance, according to the European efficiency, has been also compared, where an enhancement of 2.64% has been registered.</p