Accelerated Life Testing to Predict Service Life and Reliability for an Appliance Door Hinge

Appliance manufacturers have traditionally performed physical testing using prototypes to assess reliability and service integrity of new product designs. However, for white goods where service lives are measured in years or decades, the use of endurance testing to analyze long time reliability is uneconomical. As accelerated life testing (ALT) is more efficient and less costly than traditional reliability testing, the methodology is finding increased usage by appliance manufacturers. In the present study, a simulation-based ALT approach was used to predict the service life of a polyacetal hinge cam from a consumer refrigerator. A predictive life stress model based on cumulative surface wear under accelerated stress conditions was developed and used to predict time to failure under consumer use. Results show that the life stress model demonstrated good agreement with performance testing data and reasonably predicts hinge life

Learning multiple fault diagnosis

This paper describes two methods for integrating model-based diagnosis (MBD) and explanation-based learning. The first method (EBL) uses a generate-test-debug paradigm, generating diagnostic hypotheses using learned associational rules that summarize model-based diagnostic experiences. This strategy is a form of "learning while doing" model-based troubleshooting and could be called "online learning." The second diagnosis and learning method described here (EEL-STATIC) involves ''learning in advance." Learning begins in a training phase prior to performance or testing. Empirical results of computational experiments comparing the learning methods with MBD on two devices (the polybox and the binary full adder) are reported. For the same diagnostic performance, EBL-STATIC is several orders of magnitude faster than MBD while EBL can cause performance slow-down

APPLICATION OF REMOTE AND MONITORING BASED JAVA REMOTE METHOD INVOCATION

This research aims to develop application software of Remote and Monitoring based on Java Remote Method Invocation (RMI). This application software can be used as remote control and monitoring on a connected computer network that is not limited to the operating system used. This study uses an object-oriented software development and combined with the waterfall software model process which through 4 stages. The first stage, analysis requirement, observation of the application of existing remote system, and the study of literature. Second stage, the design of the system include use case diagrams that illustrate the actors activities of the application and sequence diagrams describe the sequence of execution of applications. Third stages, coding, coding implementation of the design sequence diagrams and test units or more often called white-box testing. Fourth stages, integrated testing includes the black-box testing, alpha testing that will be used to determine the performance of the application, and beta testing to users of the Focus Group Discussion Digital Networks and Multimedia Puskom UNY. Based on the testing results of software applications Remote and Monitoring based on Java Remote Method Invocation (RMI) indicates that: 1) Application of Remote and Monitoring based Java Remote Method Invocation has been successfully designed, manufactured, and implemented. 2) The performance of the application of of Remote and Monitoring based Java Remote Method Invocation has a good performance all the systems tested can run and work in accordance with the desired specifications. 3) Feasibility of applications Remote and Monitoring based on Java Remote Method Invocation in terms of usability is very feasible with percentage 82,14 %. Keywords: applications, and remote monitoring, remote system, remote control, Java, Remote Method Invocatio

Constraint-Based Heuristic On-line Test Generation from Non-deterministic I/O EFSMs

We are investigating on-line model-based test generation from non-deterministic output-observable Input/Output Extended Finite State Machine (I/O EFSM) models of Systems Under Test (SUTs). We propose a novel constraint-based heuristic approach (Heuristic Reactive Planning Tester (xRPT)) for on-line conformance testing non-deterministic SUTs. An indicative feature of xRPT is the capability of making reasonable decisions for achieving the test goals in the on-line testing process by using the results of off-line bounded static reachability analysis based on the SUT model and test goal specification. We present xRPT in detail and make performance comparison with other existing search strategies and approaches on examples with varying complexity.Comment: In Proceedings MBT 2012, arXiv:1202.582

Gaussian Graphical Model Estimation with False Discovery Rate Control

This paper studies the estimation of high dimensional Gaussian graphical model (GGM). Typically, the existing methods depend on regularization techniques. As a result, it is necessary to choose the regularized parameter. However, the precise relationship between the regularized parameter and the number of false edges in GGM estimation is unclear. Hence, it is impossible to evaluate their performance rigorously. In this paper, we propose an alternative method by a multiple testing procedure. Based on our new test statistics for conditional dependence, we propose a simultaneous testing procedure for conditional dependence in GGM. Our method can control the false discovery rate (FDR) asymptotically. The numerical performance of the proposed method shows that our method works quite well

A Fast and Accurate Cost Model for FPGA Design Space Exploration in HPC Applications

Heterogeneous High-Performance Computing (HPC) platforms present a significant programming challenge, especially because the key users of HPC resources are scientists, not parallel programmers. We contend that compiler technology has to evolve to automatically create the best program variant by transforming a given original program. We have developed a novel methodology based on type transformations for generating correct-by-construction design variants, and an associated light-weight cost model for evaluating these variants for implementation on FPGAs. In this paper we present a key enabler of our approach, the cost model. We discuss how we are able to quickly derive accurate estimates of performance and resource-utilization from the design’s representation in our intermediate language. We show results confirming the accuracy of our cost model by testing it on three different scientific kernels. We conclude with a case-study that compares a solution generated by our framework with one from a conventional high-level synthesis tool, showing better performance and power-efficiency using our cost model based approach