143 research outputs found
Efficacy of Smart PV Inverter as a Strategic Mitigator of Network Harmonic Resonance and a Suppressor of Temporary Overvoltage Phenomenon in Distribution Systems
The research work explores the design of Smart PV inverters in terms of modelling and investigates the efficacy of a Smart PV inverter as a strategic mitigator of network harmonic resonance phenomenon and a suppressor of Temporary Overvoltage (TOV) in distribution systems. The new application and the control strategy of Smart PV inverters can also be extended to SmartPark-Plug in Electric Vehicles as the grid becomes smarter.
As the grid is becoming smarter, more challenges are encountered with the integration of PV plants in distribution systems. Smart PV inverters nowadays are equipped with specialized controllers for exchanging reactive power with the grid based on the available capacity of the inverter, after the real power generation. Although present investigators are researching on several applications of Smart PV inverters, none of the research-work in real time and in documentation have addressed the benefits of employing Smart PV inverters to mitigate network resonances. U.S based standard IEEE 519 for power quality describes the network resonance as a major contributor that has an impact on the harmonic levels. This dissertation proposes a new application for the first time in utilizing a Smart PV inverter to act as a virtual detuner in mitigating network resonance. As a part of the Smart PV inverter design, the LCL filter plays a vital role on network harmonic resonance and further has a direct impact on the stability of the controller and rest of the distribution system.
Temporary Overvoltage (TOV) phenomenon is more pronounced especially during unbalanced faults like single line to ground faults (SLGF) in the presence of PV. Such an abnormal incident can damage the customer loads. IEEE 142-“Effective grounding” technique is employed to design the grounding scheme for synchronous based generators. The utilities have been trying to make a PV system comply with IEEE 142 standard as well. Several utilities are still employing the same grounding schemes even now. The attempt has resulted in diminishing the efficacy of protection schemes. Further, millions of dollars and power has been wasted by the utilities. As a result, the concept of effective grounding for PV system has become a challenge when utilities try to mitigate TOV. With an intention of economical aspects in distribution systems planning, this dissertation also proposes a new application and a novel control scheme for utilizing Smart PV/Smart Park inverters to mitigate TOV in distribution systems for the first time. In other words, this novel application can serve as an effective and supporting schema towards ineffective grounding systems. PSCAD/EMTDC has been used throughout the course of research.
The idea of Smart inverters serving as a virtual detuner in mitigating network harmonic resonance and as a TOV suppressor in distribution systems has been devised based on the basic principle of VAR injection and absorption with a new control strategy respectively. This research would further serve as a pioneering approach for researchers and planning engineers working in distribution systems
Flatness-Based Control Methodologies to Improve Frequency Regulation in Power Systems with High Penetration of Wind
To allow for high penetration of distributed generation and alternative energy units, it is critical to minimize the complexity of generator controls and to minimize the need for close coordination across regions. We propose that existing controls be replaced by a two-tier structure of local control operating within a global context of situational awareness. Flatness as an extension of controllability for non-linear systems is a key to enabling planning and optimization at various levels of the grid in this structure. In this study, flatness-based control for: one, Automatic Generation Control (AGC) of a multi-machine system including conventional generators; and two, Doubly fed Induction Machine (DFIG) is investigated. In the proposed approach applied to conventional generators, the local control tracks the reference phase, which is obtained through economic dispatch at the global control level. As a result of applying the flatness-based method, an machine system is decoupled into n linear controllable systems in canonical form. The control strategy results in a distributed AGC formulation which is significantly easier to design and implement relative to conventional AGC. Practical constraints such as generator ramping rates can be considered in designing the local controllers. The proposed strategy demonstrates promising performance in mitigating frequency deviations and the overall structure facilitates operation of other non-traditional generators. For DFIG, the rotor flux and rotational speed are controlled to follow the desired values for active and reactive power control. Different control objectives, such as maximum power point tracking (MPPT), voltage support or curtailing wind to contribute in secondary frequency regulation, can be achieved in this two-level control structure
Dynamic Modeling and Renewable Integration Studies on the U.S. Power Grids
Wind and solar generation have gained a significant momentum in the last five years in the United States. According to the American Wind Energy Association, the installed wind power capacity has tripled from 25,410 MW in early 2009 to 74,472 MW as of the end of 2015. Meanwhile, solar photovoltaic (PV) is reported that its capacity has skyrocketed from 298 MW in 2009 to 7,260 MW in 2015 by the Solar Energy Industries Association. Despite the fact that wind and solar only make up 4.4% and 0.4% , respectively, of total electricity generation in 2014, the nation is right on its track to the Department of Energy (DOE)’s goal of 20% wind and 14% solar by year 2030. The future of renewable energy is aspiring.
The rapid growth in renewable generation results in an urge to studying the reliability implication of renewable integration. For this purpose, two DOE projects were funded to the University of Tennessee, Knoxville, and the Oak Ridge National Laboratory. The first project, Grid Operational Issues and Analyses of the Eastern Interconnection (EI), is aimed at studying the dynamic stability impact of high wind penetration on the U.S. EI system in year 2030. The second project, Frequency Response Assessment and Improvement of Three Major North American Interconnections due to High Penetrations of Photovoltaic Generation, concentrates on the influence of high solar penetration on primary frequency response.
This thesis documents the efforts of the above-mentioned two projects. Chapter 1 gives an introduction on power system dynamic modeling. Chapter 2 describes the process of dynamic models development. Chapter 3 discusses the adoption of synchro-phasor measurement for system-level dynamic model validation and the impact of turbine governor deadband on system dynamic response. Chapter 4 presents a stability impact study of high wind penetration on the U.S. Eastern Grid. Chapter 5 documents the modeling and simulation of the EI system under high solar penetration. Chapter 6 summaries two dynamic model reduction studies on the EI system. Conclusions, a summary of the major contribution of the Ph.D. work, and a discussion of possible future work are given in Chapter 7
Near-Threshold Computing: Past, Present, and Future.
Transistor threshold voltages have stagnated in recent years, deviating from constant-voltage scaling theory and directly limiting supply voltage scaling. To overcome the resulting energy and power dissipation barriers, energy efficiency can be improved through aggressive voltage scaling, and there has been increased interest in operating at near-threshold computing (NTC) supply voltages. In this region sizable energy gains are achieved with moderate performance loss, some of which can be regained through parallelism.
This thesis first provides a methodical definition of how near to threshold is "near threshold" and continues with an in-depth examination of NTC across past, present, and future CMOS technologies. By systematically defining near-threshold, the trends and tradeoffs are analyzed, lending insight in how best to design and optimize near-threshold systems.
NTC works best for technologies that feature good circuit delay scalability, therefore technologies without strong short-channel effects. Early planar technologies (prior to 90nm or so) featured good circuit scalability (8x energy gains), but lacked area in which to add cores for parallelization. Recent planar nodes (32nm – 20nm) feature more area for cores but suffer from poor delay scalability, and so are not well-suited for NTC (4x energy gains).
The switch to FinFET CMOS technology allows for a return to strong voltage scalability (8x gain), reversing trends seen in planar technologies, while dark silicon has created an opportunity to add cores for parallelization. Improved FinFET voltage scalability even allows for latency reduction of a single task, as long as the task is sufficiently parallelizable (< 10% serial code).
Finally, we will look at a technique for fast voltage boosting, called Shortstop, in which a core's operating voltage is raised in 10s of cycles. Shortstop can be used to quickly respond to single-threaded performance demands of a near-threshold system by leveraging the innate parasitic inductance of a dedicated dirty supply rail, further improving energy efficiency. The technique is demonstrated in a wirebond implementation and is able to boost a core up to 1.8x faster than a header-based approach, while reducing supply droop by 2-7x. An improved flip-chip architecture is also proposed.PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/113600/1/npfet_1.pd
Wind Power Integration into Power Systems: Stability and Control Aspects
Power network operators are rapidly incorporating wind power generation into their power grids to meet the widely accepted carbon neutrality targets and facilitate the transition from conventional fossil-fuel energy sources to clean and low-carbon renewable energy sources. Complex stability issues, such as frequency, voltage, and oscillatory instability, are frequently reported in the power grids of many countries and regions (e.g., Germany, Denmark, Ireland, and South Australia) due to the substantially increased wind power generation. Control techniques, such as virtual/emulated inertia and damping controls, could be developed to address these stability issues, and additional devices, such as energy storage systems, can also be deployed to mitigate the adverse impact of high wind power generation on various system stability problems. Moreover, other wind power integration aspects, such as capacity planning and the short- and long-term forecasting of wind power generation, also require careful attention to ensure grid security and reliability. This book includes fourteen novel research articles published in this Energies Special Issue on Wind Power Integration into Power Systems: Stability and Control Aspects, with topics ranging from stability and control to system capacity planning and forecasting
Optoelectronic study of InGaN/GaN LEDs
The quality of light emitting diodes (LEDs) has increased to a point where solid state lighting is becoming fairly common. Despite this, greater understanding of the effect of the device structure and the electric fields within them is helpful to continue improving device efficiency and uniformity and in reducing costs. In this thesis the optical and electronic properties of InGaN/GaN LEDs have been studied with a combination of luminescence spectroscopy, microscopy, conductivity mapping and efficiency measurements.A study was made of the effects of the various electric fields, and the interplay between them, on LED luminescence and conductivity. Cathodoluminescence (CL) mapping shows die to die variation across large wafers revealing the powerful effects of a induced electric field on spectral intensity/position/width, in uncontacted devices. Micron scale spots in the LED material, lower in luminescence intensity and which trap charge, were revealed by CL/EBIC mapping with the origin attributed to cluster point defects in the active region. Depth resolved CL and CL under bias reveal the extent of asymmetry in carrier transport in the p/n type GaN around the active region. LEDs grown with different active region temperature profiles were studied. Devices exposed to high temperature after quantum well growth (2T) were found to have a uniform spatial luminescence and a peak efficiency that is higher and occurs at a lower current density (0.1 W/A @ 1 Acm¯²). By contrast those with a low temperature cap (Q2T) exhibit dark spots in the luminescence, and a lower peak efficiency at a higher current density (0.04 W/A @ 10 Acm¯²). The effect of improvement in LED design and material quality on the device efficiency, uniformity and spectral characteristics was studied. The addition of an Al₀.₂₃Ga.₇₇N electron blocking layer (EBL) was found to reduce the size and strength of the dark spots by about a factor of 2, while an additional In₀.₀₅Ga₀.₉₅N underlayer (UL) removed the dark spots entirely and shifted the luminescence peak by around 100 meV. The effect on the electroluminescence efficiency of the reduction in template dislocation density was found to depend strongly on the drive current density, with defect non-radiative recombination more important at low currents. Overall device efficiency was shown to be improved with an EBL and UL. The most efficient devices were those with the 2T type growth but the relative improvements are larger in LEDs grown with the Q2T method.Together, the results present a number of factors limiting the performance of current LEDs and suggest potential routes for improvement and optimisation.The quality of light emitting diodes (LEDs) has increased to a point where solid state lighting is becoming fairly common. Despite this, greater understanding of the effect of the device structure and the electric fields within them is helpful to continue improving device efficiency and uniformity and in reducing costs. In this thesis the optical and electronic properties of InGaN/GaN LEDs have been studied with a combination of luminescence spectroscopy, microscopy, conductivity mapping and efficiency measurements.A study was made of the effects of the various electric fields, and the interplay between them, on LED luminescence and conductivity. Cathodoluminescence (CL) mapping shows die to die variation across large wafers revealing the powerful effects of a induced electric field on spectral intensity/position/width, in uncontacted devices. Micron scale spots in the LED material, lower in luminescence intensity and which trap charge, were revealed by CL/EBIC mapping with the origin attributed to cluster point defects in the active region. Depth resolved CL and CL under bias reveal the extent of asymmetry in carrier transport in the p/n type GaN around the active region. LEDs grown with different active region temperature profiles were studied. Devices exposed to high temperature after quantum well growth (2T) were found to have a uniform spatial luminescence and a peak efficiency that is higher and occurs at a lower current density (0.1 W/A @ 1 Acm¯²). By contrast those with a low temperature cap (Q2T) exhibit dark spots in the luminescence, and a lower peak efficiency at a higher current density (0.04 W/A @ 10 Acm¯²). The effect of improvement in LED design and material quality on the device efficiency, uniformity and spectral characteristics was studied. The addition of an Al₀.₂₃Ga.₇₇N electron blocking layer (EBL) was found to reduce the size and strength of the dark spots by about a factor of 2, while an additional In₀.₀₅Ga₀.₉₅N underlayer (UL) removed the dark spots entirely and shifted the luminescence peak by around 100 meV. The effect on the electroluminescence efficiency of the reduction in template dislocation density was found to depend strongly on the drive current density, with defect non-radiative recombination more important at low currents. Overall device efficiency was shown to be improved with an EBL and UL. The most efficient devices were those with the 2T type growth but the relative improvements are larger in LEDs grown with the Q2T method.Together, the results present a number of factors limiting the performance of current LEDs and suggest potential routes for improvement and optimisation
Resilient Design for Process and Runtime Variations
The main objective of this thesis is to tackle the impact of parameter variations in order to improve the chip performance and extend its lifetime
High Quality Test Generation Targeting Power Supply Noise
Delay test is an essential structural manufacturing test used to determine the maximal frequency at which a chip can run without incurring any functional failures. The central unsolved challenge is achieving high delay correlation with the functional test, which is dominated by power supply noise (PSN). Differences in PSN between functional and structural tests can lead to differences in chip operating frequencies of 30% or more. Pseudo functional test (PFT), based on a multiple-cycle clocking scheme, has better PSN correlation with functional test compared with traditional two-cycle at-speed test. However, PFT is vulnerable to under-testing when applied to delay test. This work aims to generate high quality PFT patterns, achieving high PSN correlation with functional test.
First, a simulation-based don’t-care filling algorithm, Bit-Flip, is proposed to improve the PSN for PFT. It relies on randomly flipping a group of bits in the test pattern to explore the search space and find patterns that stress the circuits with the worst-case, but close to functional PSN. Experimental results on un-compacted patterns show Bit-Flip is able to improve PSN as much as 38.7% compared with the best random fill.
Second, techniques are developed to improve the efficiency of Bit-Flip. A set of partial patterns, which sensitize transitions on critical cells, are pre-computed and later used to guide the selection of bits to flip. Combining random and deterministic flipping, we achieve similar PSN control as Bit-Flip but with much less simulation time.
Third, we address the problem of automatic test pattern generation for extracting circuit timing sensitivity to power supply noise during post-silicon validation. A layout-aware path selection algorithm selects long paths to fully span the power delivery network. The selected patterns are intelligently filled to bring the PSN to a desired level. These patterns can be used to understand timing sensitivity in post-silicon validation by repeatedly applying the path delay test while sweeping the PSN experienced by the path from low to high.
Finally, the impacts of compression on power supply noise control are studied. Illinois Scan and embedded deterministic test (EDT) patterns are generated. Then Bit-Flip is extended to incorporate the compression constraints and applied to compressible patterns. The experimental results show that EDT lowers the maximal PSN by 24.15% and Illinois Scan lowers it by 2.77% on un-compacted patterns
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