On stability and controllability of conjunctive Boolean networks

A Boolean network (BN) is a finite state discrete time dynamical system. At each step, each variable takes a value from a binary set. The value update rule for each variable is a local function which depends only on a selected subset of variables. BNs have been used in modeling gene regulatory networks. We focus in this thesis on a special class of BNs, termed as conjunctive Boolean networks (CBNs). A BN is conjunctive if the associated value update rule is comprised of only AND operations. It is known that any trajectory of a finite dynamical system will enter a periodic orbit. Periodic orbits of a CBN are now completely understood. We first characterize in this thesis all periodic orbits of a CBN. In particular, we establish a bijection between the set of periodic orbits and the set of binary necklaces of a certain length. We further investigate the stability of a periodic orbit. Specifically, we perturb a state in the periodic orbit by changing the value of a single entry of the state. The trajectory, with the perturbed state being the initial condition, will enter another (possibly the same) periodic orbit in finite time steps. We then provide a complete characterization of all such transitions from one periodic orbit to another. In particular, we construct a digraph, with the vertices being the periodic orbits, and the (directed) edges representing the transitions among the orbits. We call such a digraph the stability structure of the CBN. We then investigate the orbit-controllability and state-controllability of a CBN. We ask the question of how one can steer a CBN to enter any periodic orbit or to reach any final state, from any initial state. Suppose that there is a selected subset of variables whose values can be controlled for some finite time steps, while other variables still follow the value update rule during all time. We establish in the thesis a necessary and sufficient condition for this subset such that the trajectory, with any initial condition, will enter any desired periodic orbit or reach any final state. We also provide algorithms specifying the methods of manipulating the values of these variables to realize these control goals

Oracles for distributed testing

Copyright @ 2010 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/ republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works.The problem of deciding whether an observed behaviour is acceptable is the oracle problem. When testing from a finite state machine (FSM) it is easy to solve the oracle problem and so it has received relatively little attention for FSMs. However, if the system under test has physically distributed interfaces, called ports, then in distributed testing we observe a local trace at each port and we compare the set of local traces with the set of allowed behaviours (global traces). This paper investigates the oracle problem for deterministic and non-deterministic FSMs and for two alternative definitions of conformance for distributed testing. We show that the oracle problem can be solved in polynomial time for the weaker notion of conformance but is NP-hard for the stronger notion of conformance, even if the FSM is deterministic. However, when testing from a deterministic FSM with controllable input sequences the oracle problem can be solved in polynomial time and similar results hold for nondeterministic FSMs. Thus, in some cases the oracle problem can be efficiently solved when using stronger notion of conformance and where this is not the case we can use the decision procedure for weaker notion of conformance as a sound approximation

Access Time Minimization in IEEE 1687 Networks

IEEE 1687 enables flexible access to the embedded (on-chip) instruments that are needed for post-silicon validation, debugging, wafer sort, package test, burn-in, printed circuit board bring-up, printed circuit board assembly manufacturing test, power-on self-test, and in-field test. At any of these scenarios, the instruments are accessed differently, and at a given scenario the instruments are accessed differently over time. It means the IEEE 1687 network needs to be frequently reconfigured from accessing one set of instruments to accessing a different set of instruments. Due to the need of frequent reconfiguration of the IEEE 1687 network it is important to (1) minimize the run-time for the algorithm finding the new reconfiguration, and (2) generate scan vectors with minimized access time. In this paper we model the reconfiguration problem using Boolean Satisfiability Problem (SAT). Compared to previous works we show significant reduction in run-time and we ensure minimal access time for the generated scan vectors