Symbol Synchronization for SDR Using a Polyphase Filterbank Based on an FPGA

This paper is devoted to the proposal of a highly efficient symbol synchronization subsystem for Software Defined Radio. The proposed feedback phase-locked loop timing synchronizer is suitable for parallel implementation on an FPGA. The polyphase FIR filter simultaneously performs matched-filtering and arbitrary interpolation between acquired samples. Determination of the proper sampling instant is achieved by selecting a suitable polyphase filterbank using a derived index. This index is determined based on the output either the Zero-Crossing or Gardner Timing Error Detector. The paper will extensively focus on simulation of the proposed synchronization system. On the basis of this simulation, a complete, fully pipelined VHDL description model is created. This model is composed of a fully parallel polyphase filterbank based on distributed arithmetic, timing error detector and interpolation control block. Finally, RTL synthesis on an Altera Cyclone IV FPGA is presented and resource utilization in comparison with a conventional model is analyzed

From Theory to Practice: Sub-Nyquist Sampling of Sparse Wideband Analog Signals

Conventional sub-Nyquist sampling methods for analog signals exploit prior information about the spectral support. In this paper, we consider the challenging problem of blind sub-Nyquist sampling of multiband signals, whose unknown frequency support occupies only a small portion of a wide spectrum. Our primary design goals are efficient hardware implementation and low computational load on the supporting digital processing. We propose a system, named the modulated wideband converter, which first multiplies the analog signal by a bank of periodic waveforms. The product is then lowpass filtered and sampled uniformly at a low rate, which is orders of magnitude smaller than Nyquist. Perfect recovery from the proposed samples is achieved under certain necessary and sufficient conditions. We also develop a digital architecture, which allows either reconstruction of the analog input, or processing of any band of interest at a low rate, that is, without interpolating to the high Nyquist rate. Numerical simulations demonstrate many engineering aspects: robustness to noise and mismodeling, potential hardware simplifications, realtime performance for signals with time-varying support and stability to quantization effects. We compare our system with two previous approaches: periodic nonuniform sampling, which is bandwidth limited by existing hardware devices, and the random demodulator, which is restricted to discrete multitone signals and has a high computational load. In the broader context of Nyquist sampling, our scheme has the potential to break through the bandwidth barrier of state-of-the-art analog conversion technologies such as interleaved converters.Comment: 17 pages, 12 figures, to appear in IEEE Journal of Selected Topics in Signal Processing, the special issue on Compressed Sensin

Accelerated hardware video object segmentation: From foreground detection to connected components labelling

This is the preprint version of the Article - Copyright @ 2010 ElsevierThis paper demonstrates the use of a single-chip FPGA for the segmentation of moving objects in a video sequence. The system maintains highly accurate background models, and integrates the detection of foreground pixels with the labelling of objects using a connected components algorithm. The background models are based on 24-bit RGB values and 8-bit gray scale intensity values. A multimodal background differencing algorithm is presented, using a single FPGA chip and four blocks of RAM. The real-time connected component labelling algorithm, also designed for FPGA implementation, run-length encodes the output of the background subtraction, and performs connected component analysis on this representation. The run-length encoding, together with other parts of the algorithm, is performed in parallel; sequential operations are minimized as the number of run-lengths are typically less than the number of pixels. The two algorithms are pipelined together for maximum efficiency

Noise Weighting in the Design of {\Delta}{\Sigma} Modulators (with a Psychoacoustic Coder as an Example)

A design flow for {\Delta}{\Sigma} modulators is illustrated, allowing quantization noise to be shaped according to an arbitrary weighting profile. Being based on FIR NTFs, possibly with high order, the flow is best suited for digital architectures. The work builds on a recent proposal where the modulator is matched to the reconstruction filter, showing that this type of optimization can benefit a wide range of applications where noise (including in-band noise) is known to have a different impact at different frequencies. The design of a multiband modulator, a modulator avoiding DC noise, and an audio modulator capable of distributing quantization artifacts according to a psychoacoustic model are discussed as examples. A software toolbox is provided as a general design aid and to replicate the proposed results.Comment: 5 pages, 18 figures, journal. Code accompanying the paper is available at http://pydsm.googlecode.co

Design and multiplier-less realization of matched filters with variable fractional delay for software radio receivers

The 47th Midwest Symposium on Circuits and Systems Conference, Salt Lake City, Utah, USA, 25-28 July 2004This paper studies the design and multiplier-less realization of variable fractional delay matched filters (VFD-MFs), which provide matching filtering and variable fractional delay of the filter output. It offers greater flexibility and lower delay in symbol-timing adjustment than directly cascading a match filter with a fractional delayer. The design of VFD-MFs, which can be viewed as a variable digital filter (VDF) design problem subject to the matched filtering condition, is formulated as a second order cone programming (SOCP) problem with least square design criteria. The proposed VFD-MFs can be efficiently implemented using the Farrow structure. By employing sum-of-power-of-two (SOPOT) coefficients and the multiplier block (MB) technique, very efficient multiplier-less realization of the VFD-MF with low hardware complexity is obtained. A design example is given to demonstrate the effectiveness of the proposed approach.published_or_final_versio

High-Precision Measurement of Sine and Pulse Reference Signals using Software-Defined Radio

This paper addresses simultaneous, high-precision measurement and analysis of generic reference signals by using inexpensive commercial off-the-shelf Software Defined Radio hardware. Sine reference signals are digitally down-converted to baseband for the analysis of phase deviations. Hereby, we compare the precision of the fixed-point hardware Digital Signal Processing chain with a custom Single Instruction Multiple Data (SIMD) x86 floating-point implementation. Pulse reference signals are analyzed by a software trigger that precisely locates the time where the slope passes a certain threshold. The measurement system is implemented and verified using the Universal Software Radio Peripheral (USRP) N210 by Ettus Research LLC. Applying standard 10 MHz and 1 PPS reference signals for testing, a measurement precision (standard deviation) of 0.36 ps and 16.6 ps is obtained, respectively. In connection with standard PC hardware, the system allows long-term acquisition and storage of measurement data over several weeks. A comparison is given to the Dual Mixer Time Difference (DMTD) and Time Interval Counter (TIC), which are state-of-the-art measurement methods for sine and pulse signal analysis, respectively. Furthermore, we show that our proposed USRP-based approach outperforms measurements with a high-grade Digital Sampling Oscilloscope.Comment: 10 pages, 15 figures, and 4 table

Ultra-wideband Spread Spectrum Communications using Software Defined Radio and Surface Acoustic Wave Correlators

Ultra-wideband (UWB) communication technology offers inherent advantages such as the ability to coexist with previously allocated Federal Communications Commission (FCC) frequencies, simple transceiver architecture, and high performance in noisy environments. Spread spectrum techniques offer additional improvements beyond the conventional pulse-based UWB communications. This dissertation implements a multiple-access UWB communication system using a surface acoustic wave (SAW) correlator receiver with orthogonal frequency coding and software defined radio (SDR) base station transmitter. Orthogonal frequency coding (OFC) and pseudorandom noise (PN) coding provide a means for spreading of the UWB data. The use of orthogonal frequency coding (OFC) increases the correlator processing gain (PG) beyond that of code division multiple access (CDMA); providing added code diversity, improved pulse ambiguity, and superior performance in noisy environments. Use of SAW correlators reduces the complexity and power requirements of the receiver architecture by eliminating many of the components needed and reducing the signal processing and timing requirements necessary for digital matched filtering of the complex spreading signal. The OFC receiver correlator code sequence is hard-coded in the device due to the physical SAW implementation. The use of modern SDR forms a dynamic base station architecture which is able to programmatically generate a digitally modulated transmit signal. An embedded Xilinx Zynq ™ system on chip (SoC) technology was used to implement the SDR system; taking advantage of recent advances in digital-to-analog converter (DAC) sampling rates. SDR waveform samples are generated in baseband in-phase and quadrature (I & Q) pairs and upconverted to a 491.52 MHz operational frequency. The development of the OFC SAW correlator ultimately used in the receiver is presented along with a variety of advanced SAW correlator device embodiments. Each SAW correlator device was fabricated on lithium niobate (LiNbO3) with fractional bandwidths in excess of 20%. The SAW correlator device presented for use in system was implemented with a center frequency of 491.52 MHz; matching SDR transmit frequency. Parasitic electromagnetic feedthrough becomes problematic in the packaged SAW correlator after packaging and fixturing due to the wide bandwidths and high operational frequency. The techniques for reduction of parasitic feedthrough are discussed with before and after results showing approximately 10:1 improvement. Correlation and demodulation results are presented using the SAW correlator receiver under operation in an UWB communication system. Bipolar phase shift keying (BPSK) techniques demonstrate OFC modulation and demodulation for a test binary bit sequence. Matched OFC code reception is compared to a mismatched, or cross-correlated, sequence after correlation and demodulation. Finally, the signal-to-noise power ratio (SNR) performance results for the SAW correlator under corruption of a wideband noise source are presented