Photonic RF signal processors

The purpose of this thesis is to explore the emerging possibilities of processing radiofrequency (RF) or microwave signals in optical domain, which will be a key technology to implement next-generation mobile communication systems and future optical networks. Research activities include design and modelling of novel photonic architectures for processing and filtering of RF, microwave and millimeter wave signals of the above mentioned applications. Investigations especially focus on two basic functions and critical requirements in advanced RF systems, namely: • Interference mitigation and high Q tunable filters. • Arbitrary filter transfer function generation. The thesis begins with a review on several state-of-the-art architectures of in-fiber RF signal processing and related key optical technologies. The unique capabilities offered by in-fiber RF signal processors for processing ultra wide-band, high-frequency signals directly in optical domain make them attractive options for applications in optical networks and wide-band microwave signal processing. However, the principal drawbacks which have been demonstrated so far in the in-fiber RF signal processors arc their inflexible or expensive schemes to set tap weights and time delay. Laser coherence effects also limit sampling frequency and introduce additional phase-induced intensity noise

Optical Interference Suppression using MicroPhotonic RF Filter Structure

The impact of laser coherence noise on conventional photonic RF filters is investigated in this paper. In addition, a new microphotonic adaptive RF filter structure is proposed, which can simultaneously suppress the phased-induced intensity noise caused by optical interference. Results show that the coherence length of the laser light significantly degrades the RF frequency response of a photonic transversal RF filter, whereas the microphotonic RF filter has the capability of generating arbitrary transfer function with no phase-induced intensity nois

Adaptive applications of OPTO-VLSI processors in WDM networks

Communication is an inseparable part of human life and its nature continues to evolve and improve. The advent of laser was a herald to the new possibilities in the communication world. In recent years technologies such as Wavelength Division Multiplexing (WDM) and Erbium Doped Fiber Amplifiers (EDFA) have afforded significant boost to the practice of optical communication. At the heart of this brave new world is the need to dynamically/ adaptively steer/route beams of light carrying very large amounts of data. In recent years many techniques have been proposed for this purpose by various researchers. In this study we have elected to utilise the beam-steering capabilities of Opto-VLSI processors to investigate band-pass filtering and channel equalisation as two possible and practical applications in WDM networks

Opto-VLSI based WDM multifunction device

The tremendous expansion of telecommunication services in the past decade, in part due to the growth of the Internet, has made the development of high-bandwidth optical net-works a focus of research interest. The implementation of Dense-Wavelength Division Multiplexing (DWDM) optical fiber transmission systems has the potential to meet this demand. However, crucial components of DWDM networks – add/drop multiplexers, filters, gain equalizers as well as interconnects between optical channels – are currently not implemented as dynamically reconfigurable devices. Electronic cross-connects, the traditional solution to the reconfigurable optical networks, are increasingly not feasible due to the rapidly increasing bandwidth of the optical channels. Thus, optically transparent, dynamically reconfigurable DWDM components are important for alleviating the bottleneck in telecommunication systems of the future. In this study, we develop a promising class of Opto-VLSI based devices, including a dynamic multi-function WDM processor, combining the functions of optical filter, channel equalizer and add-drop multiplexer, as well as a reconfigurable optical power splitter. We review the technological options for all optical WDM components and compare their advantages and disadvantages. We develop a model for designing Opto-VLSI based WDM devices, and demonstrate experimentally the Opto-VLSI multi-function WDM device. Finally, we discuss the feasibility of Opto-VLSI WDM components in meeting the stringent requirements of the optical communications industry

Tunable True-Time Delay Unit Based on Opto-VLSI processing

A novel tunable true-time delay unit is proposed and demonstrated. The unit is based on the use of an Opto-VLSI processor that dynamically selects a single waveband or multiple wavebands from an RF-modulated broadband optical signal and routes them to a high-dispersion fiber for arbitrary time delay synthesis. Experimental results demonstrate continuously tunable time delay of up to 4 ns

Opto-VLSI-based adaptive optical power splitter/combiner for next generation dynamic optical telecommunication networks

The demand for optical power splitters is growing globally, due to the rapid deployment of fibre-to-the-premises, optical metropolitan area network (MAN), and active optical cables for TV/Video signal transport. Optical splitters play an important role in passive optical network (PON) technology by enabling several hundred users to share one optical line terminal. However, current PONs, which use fixed optical power splitters, have limited reconfigurability particularly in adding/dropping users to/from an optical network unit. An adaptive optical power splitter (OPS) can dynamically reallocate the opticalpower in the entire network according to the real-time distribution of users and services, thus providing numerous advantages such as improve an optical network efficiency, scalability, and reliability. An adaptive OPS is also important for realizing self-healing ring-to-ring optical MAN, thus offering automatic communication recovery when line break occurs. In addition, future optical line protection systems will require adaptive optical splitters to switch optical signals from faulty lines to active power lines, avoid the use of optical attenuators and/or amplifiers, and achieve real time line monitoring. An adaptive OPS can also be incorporated in tunable optical dispersion compensators, optical attenuator and optical gain equalizer, and reconfigurable optical switches. This thesis proposes and demonstrates the principle of a novel Opto-VLSI-based adaptive optical splitter/combiner for next generation dynamic optical telecommunication networks. The proposed splitter structure enables an input optical power to be split adaptively into a larger number of output fibre ports, through optimized phase holograms driving the Opto-VLSI processor. The new adaptive optical splitter has additional advantages including lossless operation, adequate inter-port crosstalk, compressed hardware and simple user interface. This thesis demonstrates, in particular, the concept of an adaptive optical power splitter employing an Opto-VLSI processor and a 4-f imaging system experimentally in three stages as follow: (i) a 1×2 adaptive optical power splitter based on an Opto-VLSI processor, a fibre collimator array and 4-f imaging systems (single lens), (ii) a 1×4 adaptive optical power splitter based on an Opto-VLSI processor, a fibre array and 4-f imaging systems (single lens), and (iii) a 1×N lossless adaptive optical power splitter structure integrating an Opto-VLSI processor, optical amplifiers, a fibre array, and an array of 4-f imaging systems (lens array). The thesis also demonstrates the concept of an adaptive optical signal combiner which enables multiple signals to be combined with user-defined weight profiles into a single fibre port. Experimental results demonstrate that an input optical signal can arbitrarily be split into N signals and coupled into optical fibre ports by uploading optimized multicasting phase holograms onto the Opto-VLSI processor. They also demonstrate that N input optical signals can be dynamically combined with arbitrary weights into a single optical fibre port. Excellent agreement between theoretical and experimental results is demonstrated. The total insertion loss of the optical power splitter is only 5 dB. Results also show that the optical amplifiers can compensate for the insertion and splitting losses, thus enabling lossless splitter operation. A crosstalk level around -25 dB and a wavelength spectral range exceeding 40 nm is experimentally realized. In addition, a novel broadband adaptive RF power splitter/combiner based on Opto-VLSI processor is proposed and experimentally demonstrated. By uploading optimized multicasting phase holograms onto the software-driven Opto-VLSI processor, the input RF signal is dynamically split and directed to different output ports, with userdefined splitting ratios. Also, multiple input RF signals can be dynamically combined with arbitrary user-defined weights. As a proof-of-concept demonstration, two input RF signals are dynamically combined with different user-defined weight profiles. We also propose and demonstrate a photonic microwave filter based on the use of an Opto-VLSI-based adaptive optical combiner. The experimental results demonstrate that the developed Opto-VLSI-based adaptive optical combiner can dynamically route multiple input optical signals to a single output, with user-defined weight profiles, thus realising a tunable microwave filter. Overall this Opto-VLSI-based adaptive optical power splitter should allow as many as 32 output ports to be supported while achieving high splitting resolution and dynamic range. This will greatly enhance the efficiency of optical communication networks

Low-loss chip-scale programmable silicon photonic processor

Chip-scale programmable optical signal processors are often used to flexibly manipulate the optical signals for satisfying the demands in various applications, such as lidar, radar, and artificial intelligence. Silicon photonics has unique advantages of ultra-high integration density as well as CMOS compatibility, and thus makes it possible to develop large-scale programmable optical signal processors. The challenge is the high silicon waveguides propagation losses and the high calibration complexity for all tuning elements due to the random phase errors. In this paper, we propose and demonstrate a programmable silicon photonic processor for the first time by introducing low-loss multimode photonic waveguide spirals and low-random-phase-error Mach-Zehnder switches. The present chip-scale programmable silicon photonic processor comprises a 1×4 variable power splitter based on cascaded Mach-Zehnder couplers (MZCs), four Ge/Si photodetectors, four channels of thermally-tunable optical delaylines. Each channel consists of a continuously-tuning phase shifter based on a waveguide spiral with a micro-heater and a digitally-tuning delayline realized with cascaded waveguide-spiral delaylines and MZSs for 5.68 ps time-delay step. Particularly, these waveguide spirals used here are designed to be as wide as 2 µm, enabling an ultralow propagation loss of 0.28 dB/cm. Meanwhile, these MZCs and MZSs are designed with 2-µm-wide arm waveguides, and thus the random phase errors in the MZC/MZS arms are negligible, in which case the calibration for these MZSs/MZCs becomes easy and furthermore the power consumption for compensating the phase errors can be reduced greatly. Finally, this programmable silicon photonic processor is demonstrated successfully to verify a number of distinctively different functionalities, including tunable time-delay, microwave photonic beamforming, arbitrary optical signal filtering, and arbitrary waveform generation

Automated wavelength recovery for silicon photonics

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2013.Cataloged from PDF version of thesis.Includes bibliographical references.In 2020, 1Tb/s on-/off-chip communication bandwidth and ~100fJ/bit total energy in a point to point link is predicted by Moore's law for high performance computing applications. These requirements are pushing the limits of on-chip silicon CMOS transistors and off-chip VCSELs technology. The major limitation of the current systems is the lack of ability to enable more than a single channel on a single wire/fiber. Silicon photonics, offering a solution on the same platform with CMOS technology, can enable Wavelength Division Multiplexed (WDM) systems. However, Silicon photonics has to overcome the wafer level, fabrication variations and dynamic temperature fluctuations, induced by processor cores with low-energy high-speed resonators. In this work, we offer a solution, called as Automated Wavelength Recovery (AWR), to these limitations. In order to demonstrate AWR, we design and demonstrate high performance active silicon resonators. A microdisk modulator achieved open eye-diagrams at a data rate of 25Gb/s and error-free operation up to 20Gb/s. A thermo-optically tunable microdisk modulator with Low power modulation (1 If/bit) at a data rate of 13-Gb/s, a 5.8-dB extinction ratio, a 1.22-dB insertion loss and a record-low thermal tuning (4.9-[mu].W/GHz) of a high-speed modulator is achieved. We demonstrated a new L-shaped resonant microring (LRM) modulator that achieves 30 Gb/s error-free operation in a compact (< 20 [mu]m²) structure while maintaining single-mode operation, enabling direct WDM across an uncorrupted 5.3 THz FSR. We have introduced heater elements inside a new single mode filter, a LRM filter, successfully. The LRM filter achieved high-efficiency (3.3[mu]W/GHz) and high-speed ([tau]f ~1.6 [mu]s) thermal tuning and maintained signal integrity with record low thru to drop power penalty (<1.1 dB) over the 4 THz FSR and <0.5dB insertion loss. We have integrated a heater driver and adiabatic resonant microring (ARM) filter in a commercial bulk CMOS deep-trench process for the first time. The proposed AWR algorithm is implemented with an ARM multiplexer. An advanced method for AWR is also introduced and demonstrated with passive resonators.by Erman Timurdogan.S.M

Silicon Photonic Subsystems for Inter-Chip Optical Networks

The continuous growth of electronic compute and memory nodes in terms of the number of I/O pins, bandwidth, and areal throughput poses major integration and packaging challenges associated with offloading multi-Tbit/s data rates within the few pJ/bit targets. While integrated photonics are already deployed in long and short distances such as inter and intra data centers communications, the promising characteristics of the silicon photonic platform set it as the future technology for optical interconnects in ultra short inter-chip distances. The high index contrast between the waveguide and the cladding together with strong thermo-optic and carrier effects in silicon allows developing a wide range of micro-scale and low power optical devices compatible with the CMOS fabrication processes. Furthermore, the availability of photonic foundries and new electrical and optical co-packaging techniques further pushes this platform for the next steps of commercial deployment. The work in this dissertation presents the current trends in high-performance memory and processor nodes and gives motivation for disaggregated and reconfigurable inter-chip network enabled with the silicon photonic layer. A dense WDM transceiver and broadband switch architectures are discussed to support a bi-directional network of ten hybrid-memory cubes (HMC) interconnected to ten processor nodes with an overall aggregated bandwidth of 9.6Tbit/s. Latency and energy consumption are key performance parameters in a processor to primary memory nodes connectivity. The transceiver design is based on energy-efficient micro-ring resonators, and the broadband switch is constructed with 2x2 Mach-Zehnder elements for nano-second reconfiguration. Each transceiver is based on hundreds of micro-rings to convert the native HMC electrical protocol to the optical domain and the switch is based on tens of hundreds of 2x2 elements to achieve non-blocking all-to-all connectivity. The next chapters focus on developing methods for controlling and monitoring such complex and highly integrated silicon photonic subsystems. The thermo-optic effect is characterized and we show experimentally that the phase of the optical carrier can be reliably controlled with pulse-width modulation (PWM) signal, ultimately relaxing the need for hundreds of digital to analog converters (DACs). We further show that doped waveguide heaters can be utilized as \textit{in-line} optical power monitors by measuring photo-conductance current, which is an alternative for the conventional tapping and integration of photo-diodes. The next part concerned with a common cascaded micro-ring resonator in a WDM transceiver design. We develop on an FPGA control algorithm that abstracts the physical layer and takes user-defined inputs to set the resonances to the desired wavelength in a unicast and multicast transmission modes. The associated sensitivities of these silicon ring resonators are presented and addressed with three closed-loop solutions. We first show a closed-loop operation based on tapping the error signal from the drop port of the micro-ring. The second solution presents a resonance wavelength locking with a single digital I/O for control and feedback signals. Lastly, we leverage the photo-conductance effect and demonstrate the locking procedure using only the doped heater for both control and feedback purposes. To achieve the inter-chip reconfigurability we discuss recent advances of high-port-count SiP broadband switches for reconfigurable inter-chip networks. To ensure optimal operation in terms of low insertion loss, low cross-talk and high signal integrity per routing path, hundreds of 2x2 Mach-Zehnder elements need to be biased precisely for the cross and bar states. We address this challenge with a tapless and a design agnostic calibration approach based on the photo-conductance effect. The automated algorithm returns a look-up table for all for each 2x2 element and the associated calibrated biases. Each routing scenario is then tested for insertion loss, crosstalk and bit-error rate of 25Gbit/s 4-level pulse amplitude modulation signals. The last part utilizes the Mach-Zehnder interferometers in WDM transceiver applications. We demonstrate a polarization insensitive four-channel WDM receiver with 40Gbit/s per channel and a transmitter design generating 8-level pulse amplitude modulation signals at 30Gbit/s

Sputtered silicon oxynitride for microphotonics : a materials study

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, February 2005.Includes bibliographical references (leaves 121-134).Silicon oxynitride (SiON) is an ideal waveguide material because the SiON materials system provides substantial flexibility in composition and refractive index. SiON can be varied in index from that of silicon dioxide (n=1.46) to that of silicon-rich silicon nitride (n-2.3). This flexibility in refractive index allows for the optimization of device performance by allowing trade-offs between the advantages of low-index contrast systems (low scattering losses and easy fiber-to-waveguide coupling) and the benefits of high-index-contrast systems (small waveguide size and tight bending radii). This work presents sputter processing as an alternative to traditional CVD processing. Two room-temperature SiON sputter processes are explored. The first process is a co- sputtered deposition from a silicon oxide and a silicon nitride target. The second is a reactive sputtering process from a silicon nitride target in an oxygen ambient. Silicon nitride sputtered from a silicon nitride target is also investigated. Models are provided that predict the index and composition in both the reactive and co- sputtered depositions. The cosputtered deposition is shown to follow a mixture model, while the reactive sputter deposition is shown to be either Si-flux limited or O-flux limited, depending on the partial pressure of oxygen in the reaction chamber and the power applied to the silicon nitride target. A materials study is provided that shows sputtered SiON to be a homogeneous material that gives good control of refractive index. Reactively sputtered SiON is shown to be Si-rich. These sputtered materials investigated for use in waveguides and in Er-doped waveguide amplifiers.(cont.) Low loss waveguides are demonstrated for both co-sputtered and reactively sputtered depositions. Losses below 1 dB/cm are shown for co-sputtered deposition (n=1.65). Photoluminescence of Er-doped material shows lifetimes comparable to commercial EDFA material for both co-sputtered SiON and sputtered silicon dioxide.by Jessica Gene Sandland.Ph.D