182,438 research outputs found

    Memory System for a Dynamically Adaptable Pixel Stream Architecture

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    International audienceNowadays, embedded vision systems have to face new hard requirements involved by modern applications: realtime processing of high resolution images issued by multiple image sensors. Recently, a new adaptable ring-based interconnection network on chip has been proposed. Based on adaptive datapath, it allows handling of multiple parallel pixel streams. In this paper, we present a new hierarchical memory system proposed for this adaptable ring-based architecture. The design of its different levels is discussed and we show how the memory system adapts dynamically with respect to the datapath and data access management in the interconnection network. We also present the timing performance and area occupation measured on an FPGA prototype

    Efficient System-Level Prototyping of Power-Aware Dynamic Memory Managers for Embedded Systems

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    In the near future, portable embedded devices must run multimedia and wireless network applications with enormous computational performance (1-40GOPS) requirements at a low energy consumption (0.1–2 W). In these applications, the dynamic memory subsystem is currently one of the main sources of power consumption and its inappropriate management can severely affect the performance of the whole system. Within this context, the construction and power evaluation of custom memory managers is one of the most difficult parts for an efficient mapping of such dynamic applications on low-power embedded systems. In this paper, we present a new system-level approach to model complex dynamic memory managers integrating detailed power profiling information. This approach allows to obtain power consumption estimates, memory footprint and memory access values to refine the dynamic memory management of the system in an early stage of the design flow and to easily explore the large search space of memory manager implementations

    Dynamic Memory Management Design Methodology for Reduced Memory Footprint in Multimedia and Wireless Network Applications

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    New portable consumer embedded devices must execute multimedia and wireless network applications that demand extensive memory footprint. Moreover, they must heavily rely on Dynamic Memory (DM) due to the unpredictability of the input data (e.g. 3D streams features) and system behaviour (e.g. number of applications running concurrently defined by the user). Within this context, consistent design methodologies that can tackle efficiently the complex DM behaviour of these multimedia and network applications are in great need. In this paper, we present a new methodology that allows to design custom DM management mechanisms with a reduced memory footprint for such kind of dynamic applications. The experimental results in real case studies show that our methodology improves memory footprint 60% on average over current state-of-the-art DM managers

    IMPLEMENTING THE EFFECTIVE FILE SYSTEM OF SECONDARY MEMORY MANAGEMENT IN WIRELESS SENSOR NETWORKS

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    This paper will present the importance of the wireless sensor network.  These are playing   significant role in research domains.  Thousands of sensors are fabricated in a multi-hop wireless sensor network for computational operations, communication process, and sensing.  The following are the major areas of applications where WSNs are used border security and surveillance, medical care, agricultural sector, traffic and transport monitoring, process control, fire monitoring and son on.   Since, these networks are having wide range of real-time applications along with distributed embedded system. Hence, these systems need highly vibrant environments for huge computational operations and communications, must suit the parameters like resource limitations and limited communication capabilities, timing constraints. WSNs combines the sensing, computation, and communication into a single miniature component, that will have a sensors, a processing unit with restricted computational power and limited memory, a communication device may be a radio transmission control or optical transmission control and a battery for providing power source.  There are many gaps in researching of memory management for WSN in associate concurrent applications.  Management of real-time traffic needs lots of memory for emerging new applications in this area. So, it becomes a challenge to design effective memory management techniques.  Finally, this project will specifically propose a efficient memory management technique for different operating systems to handle the such applications in WSNs

    Data management of on-line partial discharge monitoring using wireless sensor nodes integrated with a multi-agent system

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    On-line partial discharge monitoring has been the subject of significant research in previous years but little work has been carried out with regard to the management of on-site data. To date, on-line partial discharge monitoring within a substation has only been concerned with single plant items, so the data management problem has been minimal. As the age of plant equipment increases, so does the need for condition monitoring to ensure maximum lifespan. This paper presents an approach to the management of partial discharge data through the use of embedded monitoring techniques running on wireless sensor nodes. This method is illustrated by a case study on partial discharge monitoring data from an ageing HVDC reactor

    Supporting Cyber-Physical Systems with Wireless Sensor Networks: An Outlook of Software and Services

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    Sensing, communication, computation and control technologies are the essential building blocks of a cyber-physical system (CPS). Wireless sensor networks (WSNs) are a way to support CPS as they provide fine-grained spatial-temporal sensing, communication and computation at a low premium of cost and power. In this article, we explore the fundamental concepts guiding the design and implementation of WSNs. We report the latest developments in WSN software and services for meeting existing requirements and newer demands; particularly in the areas of: operating system, simulator and emulator, programming abstraction, virtualization, IP-based communication and security, time and location, and network monitoring and management. We also reflect on the ongoing efforts in providing dependable assurances for WSN-driven CPS. Finally, we report on its applicability with a case-study on smart buildings

    A Power-Aware Framework for Executing Streaming Programs on Networks-on-Chip

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    Nilesh Karavadara, Simon Folie, Michael Zolda, Vu Thien Nga Nguyen, Raimund Kirner, 'A Power-Aware Framework for Executing Streaming Programs on Networks-on-Chip'. Paper presented at the Int'l Workshop on Performance, Power and Predictability of Many-Core Embedded Systems (3PMCES'14), Dresden, Germany, 24-28 March 2014.Software developers are discovering that practices which have successfully served single-core platforms for decades do no longer work for multi-cores. Stream processing is a parallel execution model that is well-suited for architectures with multiple computational elements that are connected by a network. We propose a power-aware streaming execution layer for network-on-chip architectures that addresses the energy constraints of embedded devices. Our proof-of-concept implementation targets the Intel SCC processor, which connects 48 cores via a network-on- chip. We motivate our design decisions and describe the status of our implementation
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