Fault-tolerance techniques for hybrid CMOS/nanoarchitecture

The authors propose two fault-tolerance techniques for hybrid CMOS/nanoarchitecture implementing logic functions as look-up tables. The authors compare the efficiency of the proposed techniques with recently reported methods that use single coding schemes in tolerating high fault rates in nanoscale fabrics. Both proposed techniques are based on error correcting codes to tackle different fault rates. In the first technique, the authors implement a combined two-dimensional coding scheme using Hamming and Bose-Chaudhuri-Hocquenghem (BCH) codes to address fault rates greater than 5. In the second technique, Hamming coding is complemented with bad line exclusion technique to tolerate fault rates higher than the first proposed technique (up to 20). The authors have also estimated the improvement that can be achieved in the circuit reliability in the presence of Don-t Care Conditions. The area, latency and energy costs of the proposed techniques were also estimated in the CMOS domain

Logic synthesis and testing techniques for switching nano-crossbar arrays

Beyond CMOS, new technologies are emerging to extend electronic systems with features unavailable to silicon-based devices. Emerging technologies provide new logic and interconnection structures for computation, storage and communication that may require new design paradigms, and therefore trigger the development of a new generation of design automation tools. In the last decade, several emerging technologies have been proposed and the time has come for studying new ad-hoc techniques and tools for logic synthesis, physical design and testing. The main goal of this project is developing a complete synthesis and optimization methodology for switching nano-crossbar arrays that leads to the design and construction of an emerging nanocomputer. New models for diode, FET, and four-terminal switch based nanoarrays are developed. The proposed methodology implements logic, arithmetic, and memory elements by considering performance parameters such as area, delay, power dissipation, and reliability. With combination of logic, arithmetic, and memory elements a synchronous state machine (SSM), representation of a computer, is realized. The proposed methodology targets variety of emerging technologies including nanowire/nanotube crossbar arrays, magnetic switch-based structures, and crossbar memories. The results of this project will be a foundation of nano-crossbar based circuit design techniques and greatly contribute to the construction of emerging computers beyond CMOS. The topic of this project can be considered under the research area of â\u80\u9cEmerging Computing Modelsâ\u80\u9d or â\u80\u9cComputational Nanoelectronicsâ\u80\u9d, more specifically the design, modeling, and simulation of new nanoscale switches beyond CMOS

Cost-Driven Repair of a Nanowire Crossbar Architecture

The recent development of nanoscale materials and assembly techniques has resulting in the manufacturing of high-density computational systems. These systems consist of nanometer-scale elements and are likely to have many manufacturing imperfections (defects); thus, defect-tolerance is considered as one of the most some algorithms for repairing defective crosspoints in a nanoscale crossbar architecture; furthermore we estimate the efficiency and cost-effectiveness of each algorithm. Also, for a given design and manufacturing environment, we propose a cost-driven method to find a balanced solution by which figures of merit such as area, repair time and reconfiguration cost can be taken into account. Probabilistic parameters are utilized in the proposed cost-driven method for added flexibility

Inventions in the Area of Nanomaterials and Nanotechnologies. Part III

Introduction. Advanced technologies inspire people by demonstrating the latest achievements (materials, methods, systems, technologies, devices etc.) that dramatically change the world. This, first of all, concerns nanotechnological inventions designed by scientists, engineers and specialists from different countries. Main part. The article provides an abstract overview of inventions of scientists, engineers and specialists from different countries: Russia, USA, Turkmenistan, Japan et al. The results of the creative activity of scientists, engineers and specialists, including inventions in the field of nanotechnology and nanomaterials allow, when introduced to industry, achieving a significant effect in construction, housing and communal services, and related sectors of the economy. For example, the invention «Modifying additive» is related to the road construction and can be applied in production of asphalt-concrete, including that with utilizing of nanotechnologies. To improve performance characteristics of bitumen and asphalt concrete one can use modifying additive which comprises a mix of carbon nanomaterials. The aim of the invention is to solve the task of creating new technology which could provide obtaining of asphalt concrete with enhanced performance characteristics. The following inventions in the field of nanotechnology can also be interesting for specialists: a method to obtain multi-layered nanocomposite coating; a method of laser surface treatment for steel products; a device to obtain graphene-containing suspension; a method to obtain nanocrystal silicon powder; a self-cleaning material with chemical and biological protection properties; a method of obtaining nanostructured composite material on the basis of aluminum; a device control system with the shape memory effect to manipulate micro- and nanoobjects; a method to form plasmon nanostructures on the object surfaces to provide non-destructive analysis of low concentrations of chemical compounds by Raman spectroscopy et al. Conclusion. One of the most challenging tasks the economy of every country face is to increase industrial competitiveness through technological upgrade. From the side of the state and companies the principal object to control in this process are the people and enterprises dealing with introduction of inventions and new technologies

Inherited Redundancy and Configurability Utilization for Repairing Nanowire Crossbars with Clustered Defects

With the recent development of nanoscale materials and assembly techniques, it is envisioned to build high-density reconfigurable systems which have never been achieved by the photolithography. Various reconfigurable architectures have been proposed based on nanowire crossbar structure as the primitive building block. Unfortunately, high-density systems consisting of nanometer-scale elements are likely to have many imperfections and variations; thus, defect-tolerance is considered as one of the most exigent challenges. In this paper, we evaluate three different logic mapping algorithms with defect avoidance to circumvent clustered defective crosspoints in nanowire reconfigurable crossbar architectures. The effectiveness of inherited redundancy and configurability utilization is demonstrated through extensive parametric simulations