281 research outputs found

    A Guide to Documenting Software Design for Maximum Software Portability for Software Defined Radios

    Get PDF
    The use of software defined communications systems is growing incredibly fast. The field of software engineering as a discipline has not adequately addressed the subject of software portability which makes large and costly software development efforts less ready to port to future platforms. By understanding the causes of portability problems, they can either be avoided altogether in development or very well documented so that they are easier to overcome in future efforts. Literature, case studies, and surveys are used to collect opinions and information about large software programs where portability is a desirable characteristic in order to best establish the facts and way forward for future research efforts

    Space Telecommunications Radio System (STRS) Architecture Standard. Release 1.02.1

    Get PDF
    This document contains the NASA architecture standard for software defined radios used in space- and ground-based platforms to enable commonality among radio developments to enhance capability and services while reducing mission and programmatic risk. Transceivers (or transponders) with functionality primarily defined in software (e.g., firmware) have the ability to change their functional behavior through software alone. This radio architecture standard offers value by employing common waveform software interfaces, method of instantiation, operation, and testing among different compliant hardware and software products. These common interfaces within the architecture abstract application software from the underlying hardware to enable technology insertion independently at either the software or hardware layer

    View on 5G Architecture: Version 1.0

    Get PDF
    The current white paper focuses on the produced results after one year research mainly from 16 projects working on the abovementioned domains. During several months, representatives from these projects have worked together to identify the key findings of their projects and capture the commonalities and also the different approaches and trends. Also they have worked to determine the challenges that remain to be overcome so as to meet the 5G requirements. The goal of 5G Architecture Working Group is to use the results captured in this white paper to assist the participating projects achieve a common reference framework. The work of this working group will continue during the following year so as to capture the latest results to be produced by the projects and further elaborate this reference framework. The 5G networks will be built around people and things and will natively meet the requirements of three groups of use cases: • Massive broadband (xMBB) that delivers gigabytes of bandwidth on demand • Massive machine-type communication (mMTC) that connects billions of sensors and machines • Critical machine-type communication (uMTC) that allows immediate feedback with high reliability and enables for example remote control over robots and autonomous driving. The demand for mobile broadband will continue to increase in the next years, largely driven by the need to deliver ultra-high definition video. However, 5G networks will also be the platform enabling growth in many industries, ranging from the IT industry to the automotive, manufacturing industries entertainment, etc. 5G will enable new applications like for example autonomous driving, remote control of robots and tactile applications, but these also bring a lot of challenges to the network. Some of these are related to provide low latency in the order of few milliseconds and high reliability compared to fixed lines. But the biggest challenge for 5G networks will be that the services to cater for a diverse set of services and their requirements. To achieve this, the goal for 5G networks will be to improve the flexibility in the architecture. The white paper is organized as follows. In section 2 we discuss the key business and technical requirements that drive the evolution of 4G networks into the 5G. In section 3 we provide the key points of the overall 5G architecture where as in section 4 we elaborate on the functional architecture. Different issues related to the physical deployment in the access, metro and core networks of the 5G network are discussed in section 5 while in section 6 we present software network enablers that are expected to play a significant role in the future networks. Section 7 presents potential impacts on standardization and section 8 concludes the white paper

    Programming techniques for efficient and interoperable software defined radios

    Get PDF
    Recently, Software-Dened Radios (SDRs) has became a hot research topic in wireless communications eld. This is jointly due to the increasing request of reconfigurable and interoperable multi-standard radio systems able to learn from their surrounding environment and efficiently exploit the available frequency spectrum resources, so realizing the cognitive radio paradigm, and to the availability of reprogrammable hardware architectures providing the computing power necessary to meet the tight real-time constraints typical of the state-of-art wideband communications standards. Most SDR implementations are based on mixed architectures in which Field Programmable Gate Arrays (FPGA), Digital Signal Processors (DSP) and General Purpose Processors (GPP) coexist. GPP-based solutions, even if providing the highest level of flexibility, are typically avoided because of their computational inefficiency and power consumption. Starting from these assumptions, this thesis tries to jointly face two of the main important issues in GPP-based SDR systems: the computational efficiency and the interoperability capacity. In the first part, this thesis presents the potential of a novel programming technique, named Memory Acceleration (MA), in which the memory resources typical of GPP-based systems are used to assist central processor in executing real-time signal processing operations. This technique, belonging to the classical computer-science optimization techniques known as Space-Time trade-offs, defines novel algorithmic methods to assist developers in designing their software-defined signal processing algorithms. In order to show its applicability some "real-world" case studies are presented together with the acceleration factor obtained. In the second part of the thesis, the interoperability issue in SDR systems is also considered. Existing software architectures, like the Software Communications Architecture (SCA), abstract the hardware/software components of a radio communications chain using a middleware like CORBA for providing full portability and interoperability to the implemented chain, called waveform in the SCA parlance. This feature is paid in terms of computational overhead introduced by the software communications middleware and this is one of the reasons why GPP-based architecture are generally discarded also for the implementation of narrow-band SCA-compliant communications standards. In this thesis we briefly analyse SCA architecture and an open-source SCA-compliant framework, ie. OSSIE, and provide guidelines to enable component-based multithreading programming and CPU affinity in that framework. We also detail the implementation of a real-time SCA-compliant waveform developed inside this modified framework, i.e. the VHF analogue aeronautical communications transceiver. Finally, we provide the proof of how it is possible to implement an efficient and interoperable real-time wideband SCA-compliant waveform, i.e. the AeroMACS waveform, on a GPP-based architecture by merging the acceleration factor provided by MA technique and the interoperability feature ensured by SCA architecture

    Radio and computing resource management in SDR clouds

    Get PDF
    The aim of this thesis is defining and developing the concept of an efficient management of radio and computing resources in an SDR cloud. The SDR cloud breaks with today's cellular architecture. A set of distributed antennas are connected by optical fibre to data processing centres. The radio and computing infrastructure can be shared between different operators (virtualization), reducing costs and risks, while increasing the capacity and creating new business models and opportunities. The data centre centralizes the management of all system resources: antennas, spectrum, computing, routing, etc. Specially relevant is the computing resource management (CRM), whose objective is dynamically providing sufficient computing resources for a real-time execution of signal processing algorithms. Current CRM techniques are not designed for wireless applications. We demonstrate that this imposes a limit on the wireless traffic a CRM entity is capable to support. Based on this, a distributed management is proposed, where multiple CRM entities manage a cluster of processors, whose optimal size is derived from the traffic density. Radio resource management techniques (RRM) also need to be adapted to the characteristics of the new SDR cloud architecture. We introduce a linear cost model to measure the cost associated to the infrastructure resources consumed according to the pay-per-use model. Based on this model, we formulate the efficiency maximization power allocation problem (EMPA). The operational costs per transmitted bit achieved by EMPA are 6 times lower than with traditional power allocation methods. Analytical solutions are obtained for the single channel case, with and without channel state information at the transmitter. It is shown that the optimal transmission rate is an increasing function of the product of the channel gain with the operational costs divided by the power costs. The EMPA solution for multiple channels has the form of water-filling, present in many power allocation problems. In order to be able to obtain insights about how the optimal solution behaves as a function of the problem parameters, a novel technique based on ordered statistics has been developed. This technique allows solving general water-filling problems based on the channel statistics rather than their realization. This approach has allowed designing a low complexity EMPA algorithm (2 to 4 orders of magnitude faster than state-of-the-art algorithms). Using the ordered statistics technique, we have shown that the optimal transmission rate behaviour with respect to the average channel gains and cost parameters is equivalent to the single channel case and that the efficiency increases with the number of available channels. The results can be applied to design more efficient SDR clouds. As an example, we have derived the optimal ratio of number of antennas per user that maximizes the efficiency. As new users enter and leave the network, this ratio should be kept constant, enabling and disabling antennas dynamically. This approach exploits the dynamism and elasticity provided by the SDR cloud. In summary, this dissertation aims at influencing towards a change in the communications system management model (typically RRM), considering the introduction of the new infrastructure model (SDR cloud), new business models (based on Cloud Computing) and a more conciliatory view of an efficient resource management, not only focused on the optimization of the spectrum usage.El objetivo de esta tesis es de nir y desarrollar el concepto de gesti on e ciente de los recursos de radio y computaci on en un SDR cloud. El SDR cloud rompe con la estructura del sistema celular actual. Un conjunto de antenas distribuidas se conectan a centros de procesamiento mediante enlaces de comunicaci on de bra optica. La infraestructura de radio y procesamiento puede ser compartida entre distintos operadores (virtualizacion), disminuyendo costes y riesgos, aumentando la capacidad y abriendo nuevos modelos y oportunidades de negocio. La centralizaci on de la gesti on del sistema viene soportada por el centro de procesamiento, donde se realiza una gesti on de todos los recursos del sistema: antenas, espectro, computaci on, enrutado, etc. Resulta de especial relevancia la gesti on de los recursos de computaci on (CRM) cuyo objetivo es el de proveer, din amicamente, de su cientes recursos de computaci on para la ejecuci on en tiempo real de algoritmos de procesado del señal. Las t ecnicas actuales de CRM no han sido diseñadas para aplicaciones de comunicaciones. Demostramos que esta caracter stica impone un l ímite en el tr áfi co que un gestor CRM puede soportar. En base a ello, proponemos una gesti on distribuida donde m ultiples entidades CRM gestionan grupos de procesadores, cuyo tamaño optimo se deriva de la densidad de tr áfi co. Las t ecnicas actuales de gesti on de recursos radio (RRM) tambi en deben ser adaptadas a las caracter sticas de la nueva arquitectura SDR cloud. Introducimos un modelo de coste lineal que caracteriza los costes asociados al consumo de recursos de la infraestructura seg un el modelo de pago-por-uso. A partir de este modelo, formulamos el problema de asignaci on de potencia de m axima e ciencia (EMPA). Mediante una asignaci on EMPA, los costes de operaci on por bit transmitido son del orden de 6 veces menores que con los m etodos tradicionales. Se han obtenido soluciones anal ticas para el caso de un solo canal, con y sin informacion del canal disponible en el transmisor, y se ha demostrado que la velocidad optima de transmisi on es una funci on creciente del producto de la ganancia del canal por los costes operativos dividido entre los costes de potencia. La soluci on EMPA para varios canales satisface el modelo "water- lling", presente en muchos tipos de optimizaci on de potencia. Con el objetivo de conocer c omo esta se comporta en funci on de los par ametros del sistema, se ha desarrollado una t ecnica nueva basada en estadí sticas ordenadas. Esta t ecnica permite solucionar el problema del water- lling bas andose en la estadí stica del canal en vez de en su realizaci on. Este planteamiento, despu es de profundos an alisis matem aticos, ha permitido desarrollar un algoritmo de asignaci on de potencia de baja complejidad (2 a 4 ordenes de magnitud m as r apido que el estado del arte). Mediante esta t ecnica, se ha demostrado que la velocidad optima de transmisi on se comporta de forma equivalente al caso de un solo canal y que la e ciencia incrementa a medida que aumentan el numero de canales disponibles. Estos resultados pueden aplicarse a diseñar un SDR cloud de forma m as e ciente. A modo de ejemplo, hemos obtenido el ratio optimo de n umero de antenas por usuario que maximiza la e ciencia. A medida que los usuarios entran y salen de la red, este ratio debe mantenerse constante, a fin de mantener una efi ciencia lo m as alta posible, activando o desactivando antenas din amicamente. De esta forma se explota completamente el dinamismo ofrecido por una arquitectura el astica como el SDR cloud. En de nitiva, este trabajo pretende incidir en un cambio del modelo de gesti on de un sistema de comunicaciones (t ípicamente RRM) habida cuenta de la introducci on de una nueva infraestructura (SDR cloud), nuevos modelos de negocio (basados en Cloud Computing) y una visi on m as integradora de la gesti on e ciente de los recursos del sistema, no solo centrada en la optimizaci on del uso del espectro

    Utilizing DSP for IP telephony applications in mobile terminals

    Get PDF
    Tässä diplomityössä etsitään ja määritellään optimaalinen ohjelmistoarkkitehtuuri reaaliaikaisen puheenkoodauksen mahdollistamiseksi mobiilin laitteen Internet-puheluohjelmistossa. Arkkitehtuurille asetettiin vaatimus, jonka mukaan puhelu ja siihen liittyvä puheen reaaliaikaisuus ei saa rajoittaa tai liikaa kuormittaa laitteen muuta toiminnallisuutta. Työssä käytetty mobiili laite tarjoaa mahdollisuuden hyödyntää kahta prosessoria. Toinen prosessoreista on tarkoitettu yleisille käyttöjärjestelmille sekä ohjelmistoille ja toinen signaalinkäsittelyoperaatioille. Suunniteltu arkkitehtuuri yhdistää näiden kahden prosessorin toiminnallisuuden ja mahdollistaa reaaliaikaisen puheenkoodauksen (sekä toisto että äänitys) mobiliisissa laitteessa. Arkkitehtuuri toteutettiin ja sen suorituskykyä arvioitiin erilaisilla mittauksilla ja parametreilla. Havaittiin, että toteutus suoriutuu erinomaisesti sille asetetuista vaatimuksista. Todettiin myös, että käytettäessä ainoastaan laitteen yhtä prosessoria reaaliaikavaatimus ei täyty. Tämä johtuu puhekoodekin matemaattisesta kompleksisuudesta ja laitteen rajoitetuista ominaisuuksista. Työn aikana jätettiin kaksi patenttihakemusta.In this thesis, an optimal software architecture is studied and defined for enabling a real-time speech coding scheme in an Internet telephony application of a mobile terminal. According to a requirement set for the architecture, a phone call and the related real-time speech coding shall not limit or overload other functionality of the terminal. The mobile terminal utilized in this thesis provides a potential to take advantage of the efficiency of a dual core processor. One of the processors is designed for general purpose operating systems, and the other one for signal processing operations. The designed software architecture combines the functionality of these processors and enables real-time speech coding (both playback and capture) in the device. The architecture was implemented and its performance was evaluated with different measurements and parameters. It was observed that the implementation outperforms the requirements set. It was also confirmed that the performance of the general purpose processor is inadequate for real-time operations with the chosen speech coder/decoder. Two patent applications were filed by the author during the writing of this thesis

    Fast Memory-Based Processing in Software-Defined Radios

    Get PDF
    Negli ultimi anni le Software Defined Radio sono state un argomento di ricerca di primo piano nell'ambito dei sistemi di trasmissione radio. Molti e variegati paradigmi implementativi sono stati concepiti e proposti, con soluzioni capaci di spaziare da sistemi basati su Field Programmable Gate Array (FPGA) a implementazioni ottenute mediante un singolo General Purpose Processor (GPP) passando per dispositivi caratterizzati dalla presenza computazionalmente preponderante di un Digital Signal Processor (DSP) o da architetture miste. Tali soluzioni rappresentano punti di equilibrio diversi dell'inevitabile compromesso tra flessibilità e capacità computazionale del sistema di trasmissione implementato, comprimendo in qualche modo l'aspirazione ad un sistema radio universale propria del concetto originario dell'SDR. A questo riguardo, le soluzioni SDR basate su GPP rappresentano il modello implementativo maggiormente desiderabile in quanto costituiscono l'alternativa più flessibile ed economica tra tutte le tipologie di SDR. Ciò nonostante, la scarsa capacità computazionale ha sempre limitato l'adozione di questi sistemi in scenari produttivi di vasta scala. Se convenientemente applicati entro il contesto di sviluppo SDR, concetti classici noti in informatica sotto la denominazione collettiva di space/time trade-off possono essere di enorme aiuto quando si cerchi di mitigare un simile problema. Traendo ispirazione da detti concetti, nonché estendendoli ed applicandoli all'abito dell'SDR, questa tesi sviluppa e presenta una tecnica di programmazione specifica per software radio chiamata Memory Acceleration (MA) che, mediante un uso estensivo delle risorse di memoria disponibili a bordo di un tipico sistema di calcolo general purpose, può fornire alle SDR convenzionali basate su GPP fattori di accelerazione sostanziali (circa un ordine di grandezza) senza ridurne la peculiare flessibilità. Alcune rilevanti implementazioni di sistemi SDR capaci di lavorare in tempo reale su processori GPP consumer-grade realizzate in tecnica MA sono descritte in dettaglio entro questo lavoro di tesi e fornite come prova della reale efficacia del concetto proposto

    Scalable reconfigurable computing leveraging latency-insensitive channels

    Get PDF
    Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2013.Cataloged from PDF version of thesis.Includes bibliographical references (p. 190-197).Traditionally, FPGAs have been confined to the limited role of small, low-volume ASIC replacements and as circuit emulators. However, continued Moore's law scaling has given FPGAs new life as accelerators for applications that map well to fine-grained parallel substrates. Examples of such applications include processor modelling, compression, and digital signal processing. Although FPGAs continue to increase in size, some interesting designs still fail to fit in to a single FPGA. Many tools exist that partition RTL descriptions across FPGAs. Unfortunately, existing tools have low performance due to the inefficiency of maintaining the cycle-by-cycle behavior of RTL among discrete FPGAs. These tools are unsuitable for use in FPGA program acceleration, as the purpose of an accelerator is to make applications run faster. This thesis presents latency-insensitive channels, a language-level mechanism by which programmers express points in their their design at which the cycle-by-cycle behavior of the design may be modified by the compiler. By decoupling the timing of portions of the RTL from the high-level function of the program, designs may be mapped to multiple FPGAs without suffering the performance degradation observed in existing tools. This thesis demonstrates, using a diverse set of large designs, that FPGA programs described in terms of latency-insensitive channels obtain significant gains in design feasibility, compilation time, and run-time when mapped to multiple FPGAs.by Kermin Elliott Fleming, Jr.Ph.D

    Development and Evaluation of a Real-Time Framework for a Portable Assistive Hearing Device

    Get PDF
    Testing and verification of digital hearing aid devices, and the embedded software and algorithms can prove to be a challenging task especially taking into account time-to-market considerations. This thesis describes a PC based, real-time, highly configurable framework for the evaluation of audio algorithms. Implementation of audio processing algorithms on such a platform can provide hearing aid designers and manufacturers the ability to test new and existing processing techniques and collect data about their performance in real-life situations, and without the need to develop a prototype device. The platform is based on the Eurotech Catalyst development kit and the Fedora Linux OS, and it utilizes the JACK audio engine to facilitate reliable real-time performance Additionally, we demonstrate the capabilities of this platform by implementing an audio processing chain targeted at improving speech intelligibility for people suffering from auditory neuropathy. Evaluation is performed for both noisy and noise-free environments. Subjective evaluation of the results, using normal hearing listeners and an auditory neuropathy simulator, demonstrates improvement in some conditions
    corecore