Towards Single-Chip Nano-Systems

Important scientific discoveries are being propelled by the advent of nano-scale sensors that capture weak signals from their environment and pass them to complex instrumentation interface circuits for signal detection and processing. The highlight of this research is to investigate fabrication technologies to integrate such precision equipment with nano-sensors on a single complementary metal oxide semiconductor (CMOS) chip. In this context, several demonstration vehicles are proposed. First, an integration technology suitable for a fully integrated flexible microelectrode array has been proposed. A microelectrode array containing a single temperature sensor has been characterized and the versatility under dry/wet, and relaxed/strained conditions has been verified. On-chip instrumentation amplifier has been utilized to improve the temperature sensitivity of the device. While the flexibility of the array has been confirmed by laminating it on a fixed single cell, future experiments are necessary to confirm application of this device for live cell and tissue measurements. The proposed array can potentially attach itself to the pulsating surface of a single living cell or a network of cells to detect their vital signs

Heterogeneous integration approach based on flip-chip bonding and misalignment self-correction elements for electronics-optics integration applications

This paper presents a high precision bonding approach, capable of submicron alignment accuracy, based on the thermosonic flip-chip bonding technique and misalignment self-correction elements. The precision of the bonding technique is guaranteed by using of misalignment self-correction bump (convex) and hollow (concave) elements. Metal cone bump and conductive sloped hollow bonding pad elements are created using micro-machining techniques, on a chip specimen and substrate, respectively. The chip and substrate are bonded face-to-face using of an ultrasonic-enhanced flip-chip bonder. By introducing of misalignment self-correction elements, repeatable bonding accuracies of less than 500 nm were confirmed through experimental investigation. Bond properties, including electrical and mechanical properties, are also characterized to confirm the success of the bonding approach. With the obtained results, the proposed bonding approach is capable of being use in electronics-optics heterogeneous integration applications

Hybrid Micro-Electro-Mechanical Tunable Filter

While advantages such as good thermal stability and processing-chemical compatibilities exist for common monolithic-integrated micro-electro-mechanically tunable filters (MEM-TF) and MEM-tunable vertical cavity surface emitting lasers (MT-VCSEL), they often require full processing to determine device characteristics. Alternatively, the MEM actuators and the optical parts may be fabricated separately, then subsequently bonded. This hybrid approach potentially increases design flexibility. Since hybrid techniques allow integration of heterogeneous material systems, best of breed compound optoelectronic devices may be customized to enable materials groups to be optimized for tasks they are best suited. Thus, as a first step toward a hybrid (AlxGa1-xAs-polySi) MT-VCSEL, this dissertation reports the design, fabrication, and demonstration of an electrostatically actuated hybrid MEM-TF. A 250x250-µm2, 4.92-µm-thick, Al0.4Ga0.6As-GaAs distributed Bragg reflector was successfully flip-bonded to a polySi piston electrostatic actuator using SU-8 photoresist as bonding adhesive. The device demonstrated 53nm (936.5 - 989.5nm) of resonant wavelength tuning over the actuation voltage range of 0 to 10 V

Towards an on-chip power supply: Integration of micro energy harvesting and storage techniques for wireless sensor networks

The lifetime of a power supply in a sensor node of a wireless sensor network is the decisive factor in the longevity of the system. Traditional Li-ion batteries cannot fulfill the demands of sensor networks that require a long operational duration. Thus, we require a solution that produces its own electricity from its surrounding and stores it for future utility. Moreover, as the sensor node architecture is developed on complimentary metal-oxide-semiconductor technology (CMOS), the manufacture of the power supply must be compatible with it. In this thesis, we shall describe the components of an on-chip lifetime power supply that can harvest the vibrational mechanical energy through piezoelectric microcantilevers and store it in a reduced graphene oxide (rGO) based microsupercapacitor, and that is fabricated through CMOS compatible techniques. Our piezoelectric microcantilevers confirm the feasibility of fabricating micro electro- mechanical-systems (MEMS) size two-degree-of-freedom systems which can solve the major issue of small bandwidth of piezoelectric micro-energy harvesters. These devices use a cut-out trapezoidal cantilever beam to enhance the stress on the cantilever’s free end while reducing the gap remarkably between its first two eigenfrequencies in 400 - 500 Hz and 1 - 2 kHz range. The energy from the M-shaped harvesters will be stored in rGO based microsupercapacitors. These microsupercapacitors are manufactured through a fully CMOS compatible, reproducible, and reliable micromachining processes. Furthermore, we have also demonstrated an improvement in their electrochemical performance and yield of fabrication through surface roughening from iron nanoparticles. We have also examined the possibility of integrating these devices into a power management unit to fully realize a lifetime power supply for wireless sensor networks

Copper / low-k technological platform for the fabrication of high quality factor above-IC passive devices

Modern communication devices demand challenging specifications in terms of miniaturization, performance, power consumption and cost. Every new generation of radio frequency integrated circuits (RF-ICs) offer better functionality at reduced size, power consumption and cost per device and per integrated function. Passive devices (resistors, inductors, capacitors, antennas and transmission lines) represent an important part of the cost and size of RF circuits. These components have not evolved at the same level of the transistor devices, especially because their performance is strongly degenerated when they scale down in size. The low resistivity silicon used to build the transistors also imposes prohibitive levels of RF losses to these passive devices. Radio frequency microelectromechanical systems (RF MEMS) are enabling technologies capable to bring significant improvement in the electrical performances and expressive size and cost reduction of these functions, with unparallel introduction of new functionalities, unimaginable to attain when using bulky, externally connected discrete components. High quality factor (Q) inductors are amongst ones of the most needed components in RF circuits and at the same time ones that are most affected by thin metallization and substrate related losses, demanding considerable research effort. This thesis presents a contribution toward the development of thick metal fabrication technologies, covering also the design, modeling and characterization of high quality factor and high self-resonant frequency (SRF) RF MEMS passive devices, with a special emphasis on spiral inductors. A new approach using damascene-like interconnect fabrication steps associated to low κ dielectrics (polyimide), highly-conductive thick copper electroplating, chemical mechanical polishing (CMP) and tailored substrate properties delivered quality factors in excess of 40 and self resonant frequencies in excess of 10 GHz, performances in the current state-of-the-art for integrated spiral inductors built on top of silicon wafers. Furthermore, the developed process steps are compatible with back-end processing used to fabricate modern IC interconnects and have a low thermal budget (< 250 °C), what makes it a good choice to build above-IC passives without degenerating the performance of passivated RF-CMOS circuits. Deep reactive ion etching (DRIE) of quartz substrates was also studied for the fabrication of spiral inductors, offering excellent RF performances (Q exceeding 40 and SRF exceeding 7 GHz). A new doubly-functional quartz packaging concept for RF MEMS devices was developed. This technique process both sides of the packaging wafer: the top is used to embed high quality factor copper inductors while the bottom is thermo-mechanically bonded to another RF MEMS wafer, offering a semi-hermetic SU-8 epoxy-based seal. The bonding process was optimized for high yield, to be compatible with SF6-plasma-released MEMS and to present low level of RF losses. Band pass filters for the GSM (1.8 GHz) and WLAN (5.2 GHz) standards were fabricated and characterized by RF measurements and full wave electromagnetic simulations. Although further development is need in order to predict the frequency response accurately, insertion losses as low as 1.2 dB were demonstrated, levels that cannot be usually attained using on-chip passives. Systematic analysis, RF measurements, electromagnetic simulations and equivalent circuit extraction were used to model the behavior of the fabricated devices and establish a methodology to deliver optimum performances for a given technological profile and specified performance targets (quality factor, inductance and frequency bandwidth). A simple yet accurate physics-based analytical model for spiral inductors was developed and proved to be accurate in terms of loss estimation for thick metal layers. This model is capable to accurately describe the frequency-dependent behavior of the device below its first resonant frequency over a large device design space. The model was validated by both measurements and full wave electromagnetic simulations and is well suited to perform numeric optimization of designs. The proposed models were also systematized in a Matlab® toolbox

Integration of Bulk Piezoelectric Materials into Microsystems.

Bulk piezoelectric ceramics, compared to deposited piezoelectric thin-films, provide greater electromechanical coupling and charge capacity, which are highly desirable in many MEMS applications. In this thesis, a technology platform is developed for wafer-level integration of bulk piezoelectric substrates on silicon, with a final film thickness of 5-100μm. The characterized processes include reliable low-temperature (200˚C) AuIn diffusion bonding and parylene bonding of bulk-PZT on silicon, wafer-level lapping of bulk-PZT with high-uniformity (±0.5μm), and low-damage micro-machining of PZT films via dicing-saw patterning, laser ablation, and wet-etching. Preservation of ferroelectric and piezoelectric properties is confirmed with hysteresis and piezo-response measurements. The introduced technology offers higher material quality and unique advantages in fabrication flexibility over existing piezoelectric film deposition methods. In order to confirm the preserved bulk properties in the final film, diaphragm and cantilever beam actuators operating in the transverse-mode are designed, fabricated and tested. The diaphragm structure and electrode shapes/sizes are optimized for maximum deflection through finite-element simulations. During tests of fabricated devices, greater than 12μmPP displacement is obtained by actuation of a 1mm2 diaphragm at 111kHz with <7mW power consumption. The close match between test data and simulation results suggests that the piezoelectric properties of bulk-PZT5A are mostly preserved without any necessity of repolarization. Three generations of resonant vibration energy harvesters are designed, simulated and fabricated to demonstrate the competitive performance of the new fabrication process over traditional piezoelectric deposition systems. An unpackaged PZT/Si unimorph harvester with 27mm3 active device volume produces up to 205μW at 1.5g/154Hz. The prototypes have achieved the highest figure-of-merits (normalized-power-density × bandwidth) amongst previously reported inertial energy harvesters. The fabricated energy harvester is utilized to create an autonomous energy generation platform in 0.3cm3 by system-level integration of a 50-80% efficient power management IC, which incorporates a supply-independent bias circuitry, an active diode for low-dropout rectification, a bias-flip system for higher efficiency, and a trickle battery charger. The overall system does not require a pre-charged battery, and has power consumption of <1μW in active-mode (measured) and <5pA in sleep-mode (simulated). Under 1g vibration at 155Hz, a 70mF ultra-capacitor is charged from 0V to 1.85V in 50 minutes.Ph.D.Electrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/91479/1/aktakka_3.pdfhttp://deepblue.lib.umich.edu/bitstream/2027.42/91479/2/aktakka_2.pdfhttp://deepblue.lib.umich.edu/bitstream/2027.42/91479/3/aktakka_1.pd

Solid State Circuits Technologies

The evolution of solid-state circuit technology has a long history within a relatively short period of time. This technology has lead to the modern information society that connects us and tools, a large market, and many types of products and applications. The solid-state circuit technology continuously evolves via breakthroughs and improvements every year. This book is devoted to review and present novel approaches for some of the main issues involved in this exciting and vigorous technology. The book is composed of 22 chapters, written by authors coming from 30 different institutions located in 12 different countries throughout the Americas, Asia and Europe. Thus, reflecting the wide international contribution to the book. The broad range of subjects presented in the book offers a general overview of the main issues in modern solid-state circuit technology. Furthermore, the book offers an in depth analysis on specific subjects for specialists. We believe the book is of great scientific and educational value for many readers. I am profoundly indebted to the support provided by all of those involved in the work. First and foremost I would like to acknowledge and thank the authors who worked hard and generously agreed to share their results and knowledge. Second I would like to express my gratitude to the Intech team that invited me to edit the book and give me their full support and a fruitful experience while working together to combine this book