584 research outputs found

    Vidutinių dažnių 5G belaidžių tinklų galios stiprintuvų tyrimas

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    This dissertation addresses the problems of ensuring efficient radio fre-quency transmission for 5G wireless networks. Taking into account, that the next generation 5G wireless network structure will be heterogeneous, the device density and their mobility will increase and massive MIMO connectivity capability will be widespread, the main investigated problem is formulated – increasing the efficiency of portable mid-band 5G wireless network CMOS power amplifier with impedance matching networks. The dissertation consists of four parts including the introduction, 3 chapters, conclusions, references and 3 annexes. The investigated problem, importance and purpose of the thesis, the ob-ject of the research methodology, as well as the scientific novelty are de-fined in the introduction. Practical significance of the obtained results, defended state-ments and the structure of the dissertation are also included. The first chapter presents an extensive literature analysis. Latest ad-vances in the structure of the modern wireless network and the importance of the power amplifier in the radio frequency transmission chain are de-scribed in detail. The latter is followed by different power amplifier archi-tectures, parameters and their improvement techniques. Reported imped-ance matching network design methods are also discussed. Chapter 1 is concluded distinguishing the possible research vectors and defining the problems raised in this dissertation. The second chapter is focused around improving the accuracy of de-signing lumped impedance matching network. The proposed methodology of estimating lumped inductor and capacitor parasitic parameters is dis-cussed in detail provi-ding complete mathematical expressions, including a summary and conclusions. The third chapter presents simulation results for the designed radio fre-quency power amplifiers. Two variations of Doherty power amplifier archi-tectures are presented in the second part, covering the full step-by-step de-sign and simulation process. The latter chapter is concluded by comparing simulation and measurement results for all designed radio frequency power amplifiers. General conclusions are followed by an extensive list of references and a list of 5 publications by the author on the topic of the dissertation. 5 papers, focusing on the subject of the discussed dissertation, have been published: three papers are included in the Clarivate Analytics Web of Sci-ence database with a citation index, one paper is included in Clarivate Ana-lytics Web of Science database Conference Proceedings, and one paper has been published in unreferred international conference preceedings. The au-thor has also made 9 presentations at 9 scientific conferences at a national and international level.Dissertatio

    Distributed Transformers for Broadband Monolithic Millimeter-Wave Integrated Power Amplifiers

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    Die vorliegende Arbeit beschreibt Methoden und Techniken zur Optimierung und Realisierung von verteilten magnetischen Transformatoren für deren Einsatz in Anpassnetzwerken von Monolithischen Integrierten Millimeterwellenschaltungen (engl. MMICs). Es werden Strategien für die Effizienz- und Bandbreitenoptimierung verteilter Transformatoren vorgestellt. Diese werden mit Hilfe einer optimierten Transformatorgeometrie verifiziert und anhand von zwei MMIC Leistungsverstärkern demonstriert

    Distributed Circuit Analysis and Design for Ultra-wideband Communication and sub-mm Wave Applications

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    This thesis explores research into new distributed circuit design techniques and topologies, developed to extend the bandwidth of amplifiers operating in the mm and sub-mm wave regimes, and in optical and visible light communication systems. Theoretical, mathematical modelling and simulation-based studies are presented, with detailed designs of new circuits based on distributed amplifier (DA) principles, and constructed using a double heterojunction bipolar transistor (DHBT) indium phosphide (InP) process with fT =fmax of 350/600 GHz. A single stage DA (SSDA) with bandwidth of 345 GHz and 8 dB gain, based on novel techniques developed in this work, shows 140% bandwidth improvement over the conventional DA design. Furthermore, the matrix-single stage DA (M-SSDA) is proposed for higher gain than both the conventional DA and matrix amplifier. A two-tier M-SSDA with 14 dB gain at 300 GHz bandwidth, and a three-tier M-SSDA with a gain of 20 dB at 324 GHz bandwidth, based on a cascode gain cell and optimized for bandwidth and gain flatness, are presented based on full foundry simulation tests. Analytical and simulation-based studies of the noise performance peculiarities of the SSDA and its multiplicative derivatives are also presented. The newly proposed circuits are fabricated as monolithic microwave integrated circuits (MMICs), with measurements showing 7.1 dB gain and 200 GHz bandwidth for the SSDA and 12 dB gain at 170 GHz bandwidth for the three-tier M-SSDA. Details of layout, fabrication and testing; and discussion of performance limiting factors and layout optimization considerations are presented. Drawing on the concept of artificial transmission line synthesis in distributed amplification, a new technique to achieve up to three-fold improvement in the modulation bandwidth of light emitting diodes (LEDs) for visible light communication (VLC) is introduced. The thesis also describes the design and application of analogue pre-emphasis to improve signal-to-noise ratio in bandwidth limited optical transceivers

    Four-element phased-array beamformers and a self-interference canceling full-duplex transciver in 130-nm SiGe for 5G applications at 26 GHz

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    This thesis is on the design of radio-frequency (RF) integrated front-end circuits for next generation 5G communication systems. The demand for higher data rates and lower latency in 5G networks can only be met using several new technologies including, but not limited to, mm-waves, massive-MIMO, and full-duplex. Use of mm-waves provides more bandwidth that is necessary for high data rates at the cost of increased attenuation in air. Massive-MIMO arrays are required to compensate for this increased path loss by providing beam steering and array gain. Furthermore, full duplex operation is desirable for improved spectrum efficiency and reduced latency. The difficulty of full duplex operation is the self-interference (SI) between transmit (TX) and receive (RX) paths. Conventional methods to suppress this interference utilize either bulky circulators, isolators, couplers or two separate antennas. These methods are not suitable for fully-integrated full-duplex massive-MIMO arrays. This thesis presents circuit and system level solutions to the issues summarized above, in the form of SiGe integrated circuits for 5G applications at 26 GHz. First, a full-duplex RF front-end architecture is proposed that is scalable to massive-MIMO arrays. It is based on blind, RF self-interference cancellation that is applicable to single/shared antenna front-ends. A high resolution RF vector modulator is developed, which is the key building block that empowers the full-duplex frontend architecture by achieving better than state-of-the-art 10-b monotonic phase control. This vector modulator is combined with linear-in-dB variable gain amplifiers and attenuators to realize a precision self-interference cancellation circuitry. Further, adaptive control of this SI canceler is made possible by including an on-chip low-power IQ downconverter. It correlates copies of transmitted and received signals and provides baseband/dc outputs that can be used to adaptively control the SI canceler. The solution comes at the cost of minimal additional circuitry, yet significantly eases linearity requirements of critical receiver blocks at RF/IF such as mixers and ADCs. Second, to complement the proposed full-duplex front-end architecture and to provide a more complete solution, high-performance beamformer ICs with 5-/6- b phase and 3-/4-b amplitude control capabilities are designed. Single-channel, separate transmitter and receiver beamformers are implemented targeting massive- MIMO mode of operation, and their four-channel versions are developed for phasedarray communication systems. Better than state-of-the-art noise performance is obtained in the RX beamformer channel, with a full-channel noise figure of 3.3 d

    Millimeter-Wave Band Pass Distributed Amplifier for Low-Cost Active Multi-Beam Antennas

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    Recently, there have been a great interest in the millimeter-wave (mmW) and terahertz (THz) bands due to the unique features they provide for various applications. For example, the mmW is not significantly affected by the atmospheric constraints and it can penetrate through clothing and other dielectric materials. Therefore, it is suitable for a vast range of imaging applications such as vision, safety, health, environmental studies, security and non-destructive testing. Millimeter-wave imaging systems have been conventionally used for high end applications implementing sophisticated and expensive technologies. Recent advancements in the silicon integrated and low loss material passive technologies have created a great opportunity to study the feasibility of low cost mmW imaging systems. However, there are several challenges to be addressed first. Examples are modeling of active and passive devices and their low performance, highly attenuated channel and poor signal to noise ratio in the mmW. The main objective of this thesis is to investigate and develop new technologies enabling cost-effective implementation of mmW and sub-mmW imaging systems. To achieve this goal, an integrated active Rotman lens architecture is proposed as an ultimate solution to combine the unique properties of a Rotman lens with the superiority of CMOS technology for fabrication of cost effective integrated mmW systems. However, due to the limited sensitivity of on-chip detectors in the mmW, a large number of high gain, wide-band and miniaturized mmW Low Noise Amplifiers (LNA) are required to implement the proposed integrated Rotman lens architecture. A unique solution presented in this thesis is the novel Band Pass Distributed Amplifier (BPDA) topology. In this new topology, by short circuiting the line terminations in a Conventional Distributed Amplifier (CDA), standing waves are created in its artificial transmission lines. Conventionally, standing waves are strongly avoided by carefully matching these lines to 50 Ω in order to prevent instability of the amplifier. This causes that a large portion of the signal be absorbed in these resistive terminations. In this thesis, it is shown that due to presence of highly lossy parasitics of CMOS transistor at the mmW the amplifier stability is inherently achieved. Moreover, by eliminating these lossy and noise terminations in the CDA, the amplifier gain is boosted and its noise figure is reduced. In addition, a considerable decrease in the number of elements enables low power realization of many amplifiers in a small chip area. Using the lumped element model of the transistor, the transfer function of a single stage BPDAs is derived and compared to its conventional counter part. A methodology to design a single stage BPDA to achieve all the design goals is presented. Using the presented design guidelines, amplifiers for different mmW frequencies have been designed, fabricated and tested. Using only 4 transistors, a 60 GHz amplifier is fabricated on a very small chip area of 0.105 mm2 by a low-cost 130 nm CMOS technology. A peak gain of 14.7 dB and a noise figure of 6 dB are measured for this fabricated amplifier. oreover, it is shown that by further circuit optimization, high gain amplification can be realized at frequencies above the cut-off frequency of the transistor. Simulations show 32 and 28 dB gain can be obtained by implementing only 6 transistors using this CMOS technology at 60 and 77 GHz. A 4-stage 85 GHz amplifier is also designed and fabricated and a measured gain of 10 dB at 82 GHz is achieved with a 3 dB bandwidth of 11 GHz from 80 to 91 GHz. A good agreement between the simulated and measured results verifies the accuracy of the design procedure. In addition, a multi-stage wide-band BPDA has been designed to show the ability of the proposed topology for design of wide band mmW amplifiers using the CMOS technology. Simulated gain of 20.5 dB with a considerable 3 dB bandwidth of 38 GHz from 30 to 68 GHz is achieved while the noise figure is less than 6 dB in the whole bandwidth. An amplifier figure of merit is defined in terms of gain, noise figure, chip area, band width and power consumption. The results are compared to those of the state of the art to demonstrate the advantages of the proposed circuit topology and presented design techniques. Finally, a Rotman lens is designed and optimized by choosing a very small Focal Lens Ratio (FL), and a high measured efficiency of greater than 30% is achieved while the lens dimensions are less than 6 mm. The lens is designed and implemented using a low cost Alumina substrate and conventional microstrip lines to ease its integration with the active parts of the system.1 yea

    Dual-band and switched-band highly efficient power amplifiers

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    The Power Amplifier is the most challenging module of a wireless network to design and it is the highest power consumer. Lots of research has been dedicated to design highly efficient and linear power amplifiers. The high demand for wireless communication systems creates the requirement for multiband transmitters and receivers. Providing high efficiency for power amplifiers in multiband applications is even more challenging. The work presented in this thesis is focused on designing high efficiency frequency adaptive power amplifiers. Frequency adaptive power amplifiers are categorized in three groups: broadband, multi-band and switched-band power amplifiers. Two main design methodologies of frequency adaptive power amplifiers are proposed in this thesis. They are dual-band and switched-band power amplifiers. The advantages and limitations of their output performances are evaluated. The main goals in this thesis are achieving high efficiency and required output power over all working bands and maintaining consistent performance over the bandwidth. In the dual-band power amplifiers, the distributed matching network is designed without any switches. Both of the switched-band Class-E power amplifiers have switched shunt capacitor values. The results demonstrate the tradeoffs between achieving consistent high performance in each band and introducing losses and complexity in the switching design

    Fully integrated cmos phase shifter/vco for mimo/ism application

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    A fully integrated CMOS 0 – 900 phase shifter in 0.18um TSMC technology is presented. With the increasing use of wireless systems in GHz range, there is high demand for integrated phase shifters in phased arrays and MIMO on chip systems. Integrated phase shifters have quite a high number of integrated inductors which consume a lot of area and introduce a huge amount of loss which make them impractical for on chip applications. Also tuning the phase shift is another concern which seems difficult with use of passive elements for integrated applications. This work is presents a new method for implementing phase shifters using only active CMOS elements which dramatically reduce the occupied area and make the tuning feasible. Also a fully integrated millimeter-wave VCO is implemented using the same technology. This VCO can be part of a 24 GHz frequency synthesizer for 24 GHz ISM band transceivers. The 24 GHz ISM band is the unlicensed band and available for commercial communication and automotive radar use, which is becoming attractive for high bandwidth data rate
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