3,404 research outputs found

    Multiple Bus Networks for Binary -Tree Algorithms.

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    Multiple bus networks (MBN) connect processors via buses. This dissertation addresses issues related to running binary-tree algorithms on MBNs. These algorithms are of a fundamental nature, and reduce inputs at leaves of a binary tree to a result at the root. We study the relationships between running time, degree (maximum number of connections per processor) and loading (maximum number of connections per bus). We also investigate fault-tolerance, meshes enhanced with MBNs, and VLSI layouts for binary-tree MBNs. We prove that the loading of optimal-time, degree-2, binary-tree MBNs is non-constant. In establishing this result, we derive three loading lower bounds Wn , W&parl0;n23&parr0; and W&parl0;nlogn&parr0; , each tighter than the previous one. We also show that if the degree is increased to 3, then the loading can be a constant. A constant loading degree-2 MBN exists, if the algorithm is allowed to run slower than the optimal. We introduce a new enhanced mesh architecture (employing binary-tree MBNs) that captures features of all existing enhanced meshes. This architecture is more flexible, allowing all existing enhanced mesh results to be ported to a more implementable platform. We present two methods for imparting tolerance to bus and processor faults in binary-tree MBNs. One of the methods is general, and can be used with any MBN and for both processor and bus faults. A key feature of this method is that it permits the network designer to designate a set of buses as unimportant and consider all faulty buses as unimportant. This minimizes the impact of faulty elements on the MBN. The second method is specific to bus faults in binary-tree MBNs, whose features it exploits to produce faster solutions. We also derive a series of results that distill the lower bound on the perimeter layout area of optimal-time, binary-tree MBNs to a single conjecture. Based on this we believe that optimal-time, binary-tree MBNs require no less area than a balanced tree topology even though such MBNs can reuse buses over various steps of the algorithm

    Design of testbed and emulation tools

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    The research summarized was concerned with the design of testbed and emulation tools suitable to assist in projecting, with reasonable accuracy, the expected performance of highly concurrent computing systems on large, complete applications. Such testbed and emulation tools are intended for the eventual use of those exploring new concurrent system architectures and organizations, either as users or as designers of such systems. While a range of alternatives was considered, a software based set of hierarchical tools was chosen to provide maximum flexibility, to ease in moving to new computers as technology improves and to take advantage of the inherent reliability and availability of commercially available computing systems

    Route Planning in Transportation Networks

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    We survey recent advances in algorithms for route planning in transportation networks. For road networks, we show that one can compute driving directions in milliseconds or less even at continental scale. A variety of techniques provide different trade-offs between preprocessing effort, space requirements, and query time. Some algorithms can answer queries in a fraction of a microsecond, while others can deal efficiently with real-time traffic. Journey planning on public transportation systems, although conceptually similar, is a significantly harder problem due to its inherent time-dependent and multicriteria nature. Although exact algorithms are fast enough for interactive queries on metropolitan transit systems, dealing with continent-sized instances requires simplifications or heavy preprocessing. The multimodal route planning problem, which seeks journeys combining schedule-based transportation (buses, trains) with unrestricted modes (walking, driving), is even harder, relying on approximate solutions even for metropolitan inputs.Comment: This is an updated version of the technical report MSR-TR-2014-4, previously published by Microsoft Research. This work was mostly done while the authors Daniel Delling, Andrew Goldberg, and Renato F. Werneck were at Microsoft Research Silicon Valle

    Computation of loop flows in electric grids with high wind energy penetration

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    2013 Fall.Includes bibliographical references.In a deregulated electricity market, the financial transmission rights (FTRs) and the bid-sell principle for energy trades are used to determine the expected power flows on transmission lines. Expected power flows are calculated by applying the superposition theorem on the approved electronic tags (e-tags). Multiple parallel paths in interconnected networks lead to division of power flows determined by the impedances of the parallel paths and the physical laws of electricity. The actual power flows in the network do not conform to the market expectations leading to unscheduled flows (USF) on transmission lines. USF have historically been estimated and accommodated deterministically for a given set of e-tags. However, wide-area interconnections experience variability and uncertainty due to a significant penetration of wind energy connected at the transmission level, thus imparting a stochastic nature to USF. A linear model, from the literature, has been adopted to model USF using a mathematical artifact called `minor loop flows'. This research develops an automated framework that provides accurate estimates of loop flows suitable for both market and network level accommodation of variable USF. This generic framework will be applicable to any power transmission network with intermittent energy resources. A loop detection algorithm (LDA) based on graph theory is proposed to detect loops in a transmission network of any size. The LDA is formulated as a modification of the A-star (A*) algorithm, the lowest ancestor theorem, and Dijkstra's algorithm. The LDA has an order of complexity of V2, where V is the total number of vertices or buses in the network under consideration. An application of a geographical information systems (GIS) technique has been established to obtain the transmission line layouts. The outcome of the LDA (i.e., minor loops) and line layouts (i.e., azimuth) are processed to compute the incidence matrix of the estimator. The variability due to the penetration of wind energy is accounted in the proposed framework using the probabilistic load flow analysis based on Monte Carlo simulations. Three techniques - ordinary least squares (OLS), analytic ridge regression (RR), and robust regression (M-estimators) - are used to estimate minor loop flows. The estimation techniques adhere to the auto-correction of the quality of estimates in case of ill-conditioning of the incidence matrix. Accuracy of loop flow estimates is highly significant, as they may be used for assigning economic responsibility of USF in electricity markets. Wind power generation companies (WGENCOs) employ forecasting models to participate in the primary electricity markets. Forecasting models used to predict the output of wind power plants are inherently erroneous and hence, their impacts on USF are studied. The impact of forecasting errors associated with the output of wind plants is investigated using the concept of prediction intervals rather than point accurate forecasts. Loop flow estimates corresponding to the prediction intervals of power output of wind power plants are computed to provide statistical bounds. The proposed framework is tested on the IEEE 14-bus and the IEEE 30-bus standard test systems with suitable modifications to represent wind energy penetration. Accurate loops are detected for the aforementioned test systems using the LDA. Thus, an automated and generic computation of loop flows is proposed along with a step-wise demonstration on IEEE test systems is provided. Future work and concluding remarks summarize the research work in this dissertation

    Efficient parallel computation on multiprocessors with optical interconnection networks

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    This dissertation studies optical interconnection networks, their architecture, address schemes, and computation and communication capabilities. We focus on a simple but powerful optical interconnection network model - the Linear Array with Reconfigurable pipelined Bus System (LARPBS). We extend the LARPBS model to a simplified higher dimensional LAPRBS and provide a set of basic computation operations. We then study the following two groups of parallel computation problems on both one dimensional LARPBS\u27s as well as multi-dimensional LARPBS\u27s: parallel comparison problems, including sorting, merging, and selection; Boolean matrix multiplication, transitive closure and their applications to connected component problems. We implement an optimal sorting algorithm on an n-processor LARPBS. With this optimal sorting algorithm at disposal, we study the sorting problem for higher dimensional LARPBS\u27s and obtain the following results: • An optimal basic Columnsort algorithm on a 2D LARPBS. • Two optimal two-way merge sort algorithms on a 2D LARPBS. • An optimal multi-way merge sorting algorithm on a 2D LARPBS. • An optimal generalized column sort algorithm on a 2D LARPBS. • An optimal generalized column sort algorithm on a 3D LARPBS. • An optimal 5-phase sorting algorithm on a 3D LARPBS. Results for selection problems are as follows: • A constant time maximum-finding algorithm on an LARPBS. • An optimal maximum-finding algorithm on an LARPBS. • An O((log log n)2) time parallel selection algorithm on an LARPBS. • An O(k(log log n)2) time parallel multi-selection algorithm on an LARPBS. While studying the computation and communication properties of the LARPBS model, we find Boolean matrix multiplication and its applications to the graph are another set of problem that can be solved efficiently on the LARPBS. Following is a list of results we have obtained in this area. • A constant time Boolean matrix multiplication algorithm. • An O(log n)-time transitive closure algorithm. • An O(log n)-time connected components algorithm. • An O(log n)-time strongly connected components algorithm. The results provided in this dissertation show the strong computation and communication power of optical interconnection networks

    Dual technique of reconfiguration and capacitor placement for distribution system

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    Radial Distribution System (RDS) suffer from high real power losses and lower bus voltages. Distribution System Reconfiguration (DSR) and Optimal Capacitor Placement (OCP) techniques are ones of the most economic and efficient approaches for loss reduction and voltage profile improvement while satisfy RDS constraints. The advantages of these two approaches can be concentrated using of both techniques together. In this study two techniques are used in different ways. First, the DSR technique is applied individually. Second, the dual technique has been adopted of DSR followed by OCP in order to identify the technique that provides the most effective performance. Three optimization algorithms have been used to obtain the optimal design in individual and dual technique. Two IEEE case studies (33bus, and 69 bus) used to check the effectiveness of proposed approaches. A Direct Backward Forward Sweep Method (DBFSM) has been used in order to calculate the total losses and voltage of each bus. Results show the capability of the proposed dual technique using Modified Biogeography Based Optimization (MBBO) algorithm to find the optimal solution for significant loss reduction and voltage profile enhancement. In addition, comparisons with literature works done to show the superiority of proposed algorithms in both techniques
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